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This version (22 Aug 2019 17:43) was approved by BrianOL.The Previously approved version (22 Aug 2019 15:50) is available.Diff

ADRV9009-ZU11EG RF System-on-Module

The ADRV9009-ZU11EG is a highly integrated RF System-On-Module (SOMs) based on the Analog Devices ADRV9009 and Xilinx Zynq UltraScale+ MPSoC. It offers a broad range of applications. It includes:

  • Two ADRV9009 devices, providing (in total):
    • Quad transmitters
    • Quad receivers
    • Quad input Observation Receiver for DPD
    • Max Rx BW: 200 MHz
    • Max Tunable Tx synthesis BW: 450 MHz
    • Max Observation Rx BW: 450MHz
    • Fully integrated fractional-N RF synthesizers
    • Multi-chip phase synchronization for all RF LO and baseband clocks
    • Tuning range: 75 MHz to 6000 MHz

  • Zynq UltraScale+ ZU11EG
    • Quad-core ARM® Cortex-A53 platform running up to 1.5GHz
      • L1 Cache 32KB I / D per core, L2 Cache 1MB, on-chip Memory 256KB
    • Dual-core Cortex-R5 real-time processors
      • L1 Cache 32KB I / D per core, Tightly Coupled Memory 128KB per core
    • Mali-400 MP2 graphics processing unit up to 667 MHz
    • PCIe® Gen2 x4, 2x USB3.0, SATA 3.1, DisplayPort, 4x Tri-mode Gigabit Ethernet
    • 2xUSB 2.0, 2x SD/SDIO, 2x UART, 2x CAN 2.0B, 2x I2C, 2x SPI, 4x 32b GPIO
    • 16nm FinFET+ programmable logic
      • 653k System Logic Cells
  • On Board Memory:
    • Processing System (Dedicated for ARM Cores) : 4 GByte DDR4(x64) (with ECC)
    • Programmable Logic (Dedicated for RF Data) : Two independent banks of 2 GByte DDR4(x32)
    • 1Gbit serial flash for image storage
    • removable SD-Card for secure file storage
  • On SOM Peripherals
    • Ethernet Phy
    • USB 2.0 Phy
    • 12V supply via FMC connectors
    • uSD Card holder

Multiple ADRV9009-ZU11EG’s can be synchronized together enabling a complete solution for complex multi-stream applications ensuring end-to-end deterministic latency. The ADRV9009 Transceivers include integrated LO and phase synchronization. Overall system frequency & phase synchronization is maintained with a clock tree structure using ADI high performance low jitter HMC7044 devices, making it ideal for applications requiring RF phase alignment with a large number of channels.

The ADRV9009-ZU11EG has extensive I/O capability. Combined with the ADRV2CRR-FMC evaluation carrier board a variety of high speed I/O can be used, including USB3, USB2, PCIe 3.0 x8, QSFP+, SFP+, 1Gb Ethernet x2, and CPRI capability. An additional High Pin Count FMC Daughter Board can be plugged into the carrier board with a further two ADRV9009 Transceivers increasing to a total of Eight Tx and Rx channels. A design can easily be evaluated and then integrated seamlessly into a custom carrier for further prototyping, or a final product greatly accelerating time to market.

  • Platform development environment support includes Industry standard Linux Industrial I/O (IIO) Applications, MATLAB®, Simulink®, and GNU Radio, and streaming interfaces for custom C, C++, python, and C# applications
  • HDL reference designs and drivers to allow zero day development

Getting Started

People who follow the flow that is outlined, have a much better experience with things. However, like many things, documentation is never as complete as it should be. If you have any questions, feel free to ask.

  1. ADRV9009-ZU11EG Further Hardware Details
  2. ADRV2CRR-FMC Carrier Board Further Hardware Details
  3. FMCOMMS8(Available later in 2019)Further Hardware Details
  4. Use the full system to better understand the ADRV9009-ZU11EG
    1. Quick Start Guides
    2. Linux Applications
    3. Push custom data into/out of the ADRV9009
  5. Design with the ADRV9009
    1. Hardware in the Loop / How to design your own custom BaseBand
    2. Design with the ADRV9009-ZU11EG based platform
      1. Linux software

Reference Book

Examples

Videos

resources/eval/user-guides/adrv9009-zu11eg.txt · Last modified: 22 Aug 2019 17:42 by BrianOL