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This version (02 Oct 2019 13:52) was approved by amiclaus.The Previously approved version (02 Oct 2019 13:47) is available.Diff

ADRV9009/ADRV9008 No-OS System Level Design Setup

This guide provides quick instructions on how to setup the No-OS project on:

  • Intel Arria 10 GX FPGA Development Kit
  • Xilinx Zynq-7000 SoC ZC706 Evaluation Kit
  • Xilinx Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit

Converting TaliseStream.bin to TaliseStream.h

After obtaining a TaliseStream.bin file from the TES GUI, this can be converted to a header file via this Linux command:

$ xxd -i TaliseStream.bin > TaliseStream.h

Source Files

Intel Platforms

Required Tools

  • Nios II Software Build Tools for Eclipse (Quartus Prime)
  • Programmer (Quartus Prime)
  • Open Nios II (Quartus Prime) and provide the workspace location.
  • Create a new Application Project: go to File → New → Nios II Application and BSP from Template

Creating a new application project

  • Add a new Hardware Platform: click from the Target Hardware information section.

Creating a new hardware platform

Config HW 2

  • Give a name to the project and select the Blank Project template and click Finish

Config new project

  • The new Blank project should look like:

Blank project

  • Create a new folder called src under sw folder

New folder

  • Copy all the source code files into the src directory.
  • The SDK should automatically build the projects and the Console window will display the result of the build. If the build is not done automatically select the Project → Build Automatically menu option.
  • At this point the software project setup is complete, the FPGA can be programmed and the software can be downloaded into the system.
  • You can program the FPGA by opening Programmer (Quartus Prime) provided by the Quartus Prime Software Suite. Click the Auto Detect button. The detected devices should be displayed now in the device list.

Programmer

  • Double-click the first device under the File column and browser for the .sof file required for the project. Make sure the Program/Configure column is checked. Press the Start button to program the FPGA.

Empty application project

  • After the FPGA was programmed, we need to create a new Run configuration in the Nios II project, by selecting RunRun Configurations…, in the Run Configuration windows select the Nios II Hardware and click at the New Configuration button at the upper left corner.

Create new run configuration

  • At the Project tab define your current project name and application executable. (.elf)
  • On the Target Connection tab, press the Refresh Connections button. You may need to expand the window or scroll to the right to see this button.
  • Check the Ignore mismatched system ID option.
  • Check the Ignore mismatched system timestamp option.
  • The output of the example program can be viewed in the Console Window.
  • When the run configuration is done, the software can be started by clicking the Run button.
  • Your new bare metal application should run
02 Oct 2019 13:29 · amiclaus

Xilinx Platforms

Required Tools

  • Xilinx Software Development Kit (XSDK) - the same version number as the Xilinx Vivado Design Suite used for generating the Hardware Platform Specification File.
  • Open Xilinx Software Development Kit (XSDK) and provide the workspace location.
  • Create a new Application Project: go to File → New → Application Project

Creating a new application project

  • Create a new Hardware Platform: click New from the Target Hardware section

Creating a new hardware platform

Import hardware description file

  • Give a name to the project and to the board support package and click Next

Application project settings

  • Select the Empty Application templeta and click Finish

Choose application template

  • The new Empty Application project should look like:

Empty application project

Some applications (e.g. FMCOMMSx), when a Microblaze processor is used, requires an increased HEAP size for dynamic memory allocation. Make sure the HEAP size is at least 0x100000.
  • Copy the source code files into the src directory
  • Make sure you uncomment the the required carrier vendor and CPU architecture from the app_config.h (or config.h) header file.
  • Example for choosing the Altera carrier in the app_config.h header file:
//#define XILINX
#define ALTERA
  • If there are multiple folders present in in the src one, include all the paths of the folders: go to the settings of the project and in the C/C++ Build → Settings → Tool Settings → gcc compiler → Directories section and add the paths of all the folders.
  • The SDK should automatically build the projects and the Console window will display the result of the build. If the build is not done automatically select the Project → Build Automatically menu option.
  • At this point the software project setup is complete, the FPGA can be programmed and the software can be downloaded into the system. You can program the FPGA by clicking on Xilinx Tools → Program FPGA
  • After the FPGA was programmed, we need to create a new Run configuration, by selecting RunRun Configurations…, in the Run Configuration windows select the Xilinx C/C++ application (System Debugger) and click at the New Configuration button at the upper left corner.

Create new run configuration

  • If your target carrier has a Zync SoC, make sure, that you specify the Initialization file, and select the Run ps7_init and Run ps7_post_config options.

Define Zynq initialization file

  • At the Application tab define your current project name and application executable. (.elf)

Define Zynq initialization file

  • The output of the example program can be viewed in the SDK console by enabling the Connect STDIO Console option and setting the baud rate of the UART port to 115200.

Define Zynq initialization file

  • As an alternative a UART terminal can be used to capture the output of the example program. The number of used UART port depends on the computer's configuration. The following settings must be used in the UART terminal:
  • Baud Rate: 115200bps
  • Data: 8 bit
  • Parity: None
  • Stop bits: 1 bit
  • Flow Control: none
  • When the run configuration is done, the software can be started by clicking the Run button.
  • Your new bare metal application should run
27 Feb 2015 14:57 · CsomI
resources/eval/user-guides/adrv9009/no-os-setup.txt · Last modified: 02 Oct 2019 13:52 by amiclaus