Wiki

This version (08 Apr 2019 10:54) was approved by aardelean.The Previously approved version (24 Oct 2018 16:22) is available.Diff

ADRV9009/ADRV9008 No-OS System Level Design Setup

This guide provides quick instructions on how to setup the No-OS project on:

  • Intel Arria 10 GX FPGA Development Kit
  • Xilinx Zynq-7000 SoC ZC706 Evaluation Kit
  • Xilinx Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit

Converting TaliseStream.bin to TaliseStream.h

After obtaining a TaliseStream.bin file from the TES GUI, this can be converted to a header file via this Linux command:

$ xxd -i TaliseStream.bin > TaliseStream.h

Intel Platforms

Working on it

Xilinx Platforms

Required Tools

  • Xilinx Software Development Kit (XSDK) - the same version number as the Xilinx Vivado Design Suite used for generating the Hardware Platform Specification File.

Source Files

  • Open Xilinx Software Development Kit (XSDK) and provide the workspace location.
  • Create a new Application Project: go to File → New → Application Project

Creating a new application project

  • Create a new Hardware Platform: click New from the Target Hardware section

Creating a new hardware platform

Import hardware description file

  • Give a name to the project and to the board support package and click Next

Application project settings

  • Select the Empty Application templeta and click Finish

Choose application template

  • The new Empty Application project should look like:

Empty application project

Some applications (e.g. FMCOMMSx), when a Microblaze processor is used, requires an increased HEAP size for dynamic memory allocation. Make sure the HEAP size is at least 0x100000.
  • Copy the source code files into the src directory
  • If there are multiple folders present in in the src one, include all the paths of the folders: go to the settings of the project and in the C/C++ Build → Settings → Tool Settings → gcc compiler → Directories section and add the paths of all the folders.
  • The SDK should automatically build the projects and the Console window will display the result of the build. If the build is not done automatically select the Project → Build Automatically menu option.
  • At this point the software project setup is complete, the FPGA can be programmed and the software can be downloaded into the system. You can program the FPGA by clicking on Xilinx Tools → Program FPGA
  • After the FPGA was programmed, we need to create a new Run configuration, by selecting RunRun Configurations…, in the Run Configuration windows select the Xilinx C/C++ application (GDB) and click at the New Configuration button at the upper left corner.

Create new run configuration

  • If your target carrier has a Zync SoC, make sure, that you specify the Initialization file, and select the Run ps7_init and Run ps7_post_config options.

Define Zynq initialization file

  • At the Application tab define your current project name and application executable. (.elf)
  • The output of the example program can be viewed in the SDK console by enabling the Connect STDIO Console option and setting the baud rate of the UART port to 115200.

Define Zynq initialization file

  • As an alternative a UART terminal can be used to capture the output of the example program. The number of used UART port depends on the computer's configuration. The following settings must be used in the UART terminal:
  • Baud Rate: 115200bps
  • Data: 8 bit
  • Parity: None
  • Stop bits: 1 bit
  • Flow Control: none
  • When the run configuration is done, the software can be started by clicking the Run button.
  • Your new bare metal application should run
27 Feb 2015 14:57 · CsomI
resources/eval/user-guides/adrv9009/no-os-setup.txt · Last modified: 08 Apr 2019 10:29 by aardelean