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Page Title Change


folded plugin

Foldable page sections

$folded = plugin_load('helper', 'folded');


DescriptionReturns the next folded ID.

Popularity Feedback Plugin

Send anonymous data about your wiki to the DokuWiki developers

$popularity = plugin_load('helper', 'popularity');


DescriptionCheck if autosubmit is enabled
Return valueresultbool


DescriptionSend the popularity data


DescriptionGather the popularity data
Return valuedatastring


DescriptionCompute the last time popularity data was sent
Return valuedataint

include plugin

Functions to include another page in a wiki page

$include = plugin_load('helper', 'include');


Descriptionoverrides standard values for showfooter and firstseconly settings

<h3>this is a test edit</h3>

Pin Map link

Numeric Formats

For help/assistance/support on the above check out: Level 1 Headline


  • High Accuracy:AD5686R (16-bit) : ±2LSB max
  • Low drift 2.5V on-chip reference: 2ppm/°C typ temperature coefficient
  • Tiny Package: 3mm × 3mm 16 lead LFCSP or 16 lead TSSOP
  • Unordered List ItemTotal Unadjusted Error (TUE): TBD max
  • Unordered List ItemOffset error: 1.5 mV max
  • Gain error: 0.1 % of FSR max
  • High drive capability: 20mA, 0.5V from supply rails
  • User Selectable Gain of 1 or 2 (GAIN pin)
  • Reset to zero-scale or midscale (RSTSEL pin)
  • 1.8V Logic Compatibility
  • 50MHz SPI with readback or daisy-chain
  • Low Glitch: 0.5nV-s
  • Robust 4kV HBM and 1.5kV FICDM ESD rating
  • Low power: mW at 3V
  • 2.7 V to 5.5 V power supply
  • −40°C to +105°C temperature range


The AD568xR are quad, 12-/14-/16-bit buffered voltage-out DACs. The devices include a 2.5V internal reference (enabled by default) coupled with a gain select pin giving a full scale output of 2.5V (GAIN=1) or 5V(GAIN=2). All devices operate from a single 2.7 V to 5.5 V supply, are guaranteed monotonic by design and exhibit less than 0.1% FSR gain error and 2mV offset error performance. The devices are housed in a 3mm X 3mm LFCSP and TSSOP packages. The part also incorporates a power-on reset circuit that ensures the DAC output powers up to zeroscale or midscale and remains there until a valid write takes place.

Block Diagram

Pin Map

Quick Setup Connection Table

Mnemonic Description
VOUTA Analog Output Voltage from DAC A

Level 1 Headline

Level 2 Headline

Level 3 Headline

Level 4 Headline

Level 5 Headline
Signal Picture


This is the CN-0196 Lab board. You can change the capacitors by resolder ones up to 50V specification instead of the used 25V electrolytic ones.

ADuCM 4x50 Development Boards

/srv/ · Last modified: 18 Mar 2020 15:29 by DerrickH