This version (01 Feb 2024 19:19) was approved by Paul Blanchard.The Previously approved version (03 Oct 2023 15:47) is available.

EVAL-CN0585-FMCZ User Guide

The EVAL-CN0585-FMCZ Low Latency Development Kit (LLDK) board is a development board consisting of 4 x 16-bit ADC channels and 4 x 16-bit DAC channels that are interfaced with an FPGA through the FMC Low Pin Count (LPC) Connector. Current revision of EVAL-CN0585-FMCZ is Rev B. EVAL-CN0585-FMCZ, EVAL-CN0584-EBZ and ZedBoard are connected together to build a development system setup as shown in Figure 1..

Figure 1. Development Platform Setup (note current LLDK system has CN0585 revB board that has USB-C power supply)

The EVAL-CN0585-FMCZ board provides a complete data acquisition and signal generation platform with onboard power rails, voltage monitoring, logic level translation, general purpose I/O, I2C, SPI, and an Analog Front End(AFE) board connector.

The key performance benefit of the EVAL-CN0585-FMCZ is the ability to perform a complete capture and conversion of precision analog input data in <70ns with the ADC module and generate a settled full-scale analog output in <200ns from initial data written to the DAC.

Figure 2. EVAL-CN0585-FMCZ Board Top

Figure 3. EVAL-CN0585-FMCZ Board Bottom

Figure 4. EVAL-CN0585-FMCZ Simplified Block Diagram

Connections and Configurations

Receive Channel

The EVAL-CN0585-FMCZ board has four ADAQ23876 16Bit 15MSPS Data Acquisition µModules to capture analog data from the AFE board connector. The Data Acquisition µModules are configured to simultaneously sample the four input channels. The data acquired by the ADAQ23876 is routed to the FPGA through the FMC LPC connector using a serial low voltage differential signaling (LVDS) digital interface in a two-lane output mode. The ADAQ23876 has pin configurable input voltage span with configurable gain/attenuation options: 0.37, 0.73, 0.87, 1.38, and 2.25, providing input voltage span ranges of ±10 V, ±5 V, ±4.096 V, ±2.5 V, and ±1.5 V. The gain/attenuation functions are accessible through the AFE board connector pins. As an example the EVAL-CN0584-EBZ is available for Hardware In the Loop (HIL) applications.

Transmit Channel

The EVAL-CN0585-FMCZ board has two AD3552R 16-bit 33MUPS DACs that provide four analog output signals to the AFE board connector. Data is transferred to the AD3552R DAC from the FPGA through the FMC LPC connector using a Quad-SPI dual data rate interface.

The AD3552R has a pin-configurable output voltage span that can be configured through the AFE board connector. Multiple output span ranges can be configured, such as 0 V to 2.5 V, 0 V to 5 V, −5 V to +5 V, −10 V to +10 V, and custom intermediate ranges with full 16-bit resolution. (Refer to Table 3)

Voltage Reference

The default ADC reference configuration uses the internal 2.048 V, ±0.1% accurate, 20 ppm/°C max voltage reference. For more stringent use cases where the accuracy and temperature drift is an issue, an external LTC6655 2.048 V, ±0.025% accurate, 2 ppm/°C max voltage reference can be used.

The default DAC reference configuration uses the internal 2.5 V, ±0.3% accurate, 10 ppm/°C max voltage reference. For more stringent use cases where the accuracy and temperature drift is an issue, an external ADR4525 2.5 V, ±0.02% accurate, 2 ppm/°C max voltage reference can be used.

VREF	Jumper Settings
ADC_VREF	Short P5
DAC_VREF	Short P4

Table 1. Voltage Reference Settings

Voltage Monitoring

The EVAL-CN0585-FMCZ board provides voltage monitoring capability for the power supply rails. The circuit consists of an AD7291 8-Channel, I2C, 12-Bit SAR ADC, and resistive dividers. Each power rail is connected to AD7291 by resistive dividers as shown in Figure 5.

Figure 5: Power Supply Voltage Monitor Circuit

The negative power supply rails are biased positive with a buffered 2.5V reference supplied by the AD7291.

Calculating the supply voltage from the positive voltage rails can be accomplished using the following equation:

Calculating the supply voltage from the negative voltage rails can be accomplished using the following equation:

Monitored Rail	CN0585 Power Rail	Scale Factor	IIO Measured Voltage	Actual Voltage
voltage0	+12 V (AD8065 DAC amp)	5.3	2.26 V	11.98 V
voltage1	-12 V (AD8065 DAC amp)	-7.81	0.65 V	-11.95 V
voltage2	+5 V (ADAQ23876 amp)	2.43	2.06 V	5.00 V
voltage3	-5 V (ADAQ23876 amp)	-4.32	0.76 V	-5.02 V
voltage4	+5 V (DAC)	2.43	2.06 V	5.00 V
voltage5	+5 V (DAC)	2.43	2.06 V	5.00 V
voltage6	+2.5 V (digital)	1.11	2.25 V	2.50 V
voltage7	+1.8 V (digital)	1	1.80 V	1.80 V

Table 2. Voltage Scaling

The default I2C address of the AD7291 is 0x20. Resistors R13, R14, R17, and R18 can be used to select alternate addressing.

Logic Level Translators

Several logic-level translators are used on the board to interface with the FMC connector signals and the various logic levels used on the board. The FMC connector signal levels are driven by the VIO voltage supplied from the FPGA board.

GPIO

A GPIO interface is provided by a MAX7301ATL+ I/O Expander connected to the SPI interface on the SPIO_CSB0 chip select interface. The GPIO outputs are controlled by writing to the MAX7301ATL+ via the SPI interface provided on the FMC connector. Four GPIO signals are utilized on the EVAL-CN0585-FMCZ board to control the power-down interface of the ADAQ23875 Data Acquisition µModules. Eight GPIO signals are level-shifted and provided to the AFE board connector for control signals on the AFE board.

I2C

The I2C interface is provided from the FPGA FMC connector and is made available to the EVAL-CN0585-FMCZ board and the user via the AFE board connector. On the EVAL-CN0585-FMCZ board the I2C interface is used to communicate with an EEPROM that is required by the Vita 57.1 Standard for board identification and IO characteristics, and the AD7291 voltage monitoring ADC.

SPI

The EVAL-CN0585-FMCZ board provides an SPI interface for the user on SPI0 from the FMC connector. Communication with the MAX7301ATL+ GPIO expander is enabled by chip select SPIO_CSB0. A second chip select, SPI_CSB1 originates from the FMC interface and connects to the AFE board connector so that the user can attach a custom secondary SPI device to the AFE board. This second SPI0_CSB1 is not initialized in the Linux device tree, as the initialization requires additional information such as SPI transmission mode, phase, and polarity. Two Quad-SPI interfaces (DAC0/1 and DAC2/3) are provided by the FMC interface to handle communications and data transfer to the four AD3552R DAC channels.

Application-specific Analog Front-End Connector

The AFE connector interface provides six signal connections for each of the four ADAQ23876 Data Acquisition µModules. The six signal connections allow the user to set the input voltage range of the differential amplifier input. Configuration resistors, if used, should be placed as close as possible to the AFE board connector. Please refer to the ADAQ23876 Datasheet for more configuration details.

Input Range	Input Signal on Pins	Feedback Connections
+/- 10V (Default)	ADCx_IN2P, ADCx_IN2N	ADCx_OUTP and ADCx_IN1N pins Shorted ADCx_OUTN and ADCx_IN1P pins Shorted
+/- 5V	ADCx_IN1P, ADCx_IN1N	ADCx_OUTP and ADCx_IN2N pins Shorted ADCx_OUTN and ADCx_IN2P pins Shorted
+/- 4.096V	ADCx_IN2P, ADCx_IN2N	No Connect
+/- 2.5V	ADCx_IN1P, ADCx_IN1N	No Connect
+/- 1.5V	ADCx_IN1P/ADCx_IN2P Shorted ADCx_IN1N/ADCx_IN2N Shorted	No Connect

Table 3: ADQ23876 Connections for Input Configuration

The AFE connector interface provides three signal connections for each of the four DAC output channels. The three signal connections allow the user to set the output voltage range of the AD3552R DAC. Configuration resistors, if used, should be placed as close as possible to the AFE board connector. The AD3552R uses a current steering DAC architecture with a VREF voltage of 2.5 V. The DAC current is converted to a voltage using an external TIA. The DAC outputs are observed on signals DAC0, DAC1, DAC2, and DAC3. The DACx outputs are fed back into the AD3552R gain configuration pins for each DAC channel. The table below details the configuration connections for each of the output voltage ranges of each of the DAC output channels. Please refer to the AD3552R Datasheet for more configuration details.

	Hardware				AD3552R Register Settings
Channel	Output Span	VZS (V)	VFS (V)	Feedback Connection	CH0_CH1_OUTPUT_range	CHx_GAIN_SCALING_N	CHx_OFFSET
CH0	+/- 10V (Default)	-10.382	10.380	DAC0 to DAC0_RFB0	0x100	0	-245
	+/- 5V	-5.165	5.166	DAC0 to DAC0_RFB0_X2	0x011	0	-495
	10V	-0.165	10.163	DAC0 to DAC0_RFB0_X2	0x010	0	495
	5V	-0.078	5.077	DAC0 to DAC0_RFB0_X1	0x001	0	0
	2.5V	-0.198	2.701	DAC0 to DAC0_RFB0_X1	0x000	3	-48
CH1	+/- 10V (Default)	-10.382	10.380	DAC1 to DAC1_RFB1	0x100	0	-245
	+/- 5V	-5.165	5.166	DAC1 to DAC1_RFB1_X2	0x011	0	-495
	10V	-0.165	10.163	DAC1 to DAC1_RFB0_X2	0x010	0	495
	5V	-0.078	5.077	DAC1 to DAC1_RFB1_X1	0x001	0	0
	2.5V	-0.198	2.701	DAC1 to DAC1_RFB1_X1	0x000	3	-48
CH2	+/- 10V (Default)	-10.382	10.380	DAC2 to DAC2_RFB0	0x100	0	-245
	+/- 5V	-5.165	5.166	DAC2 to DAC2_RFB0_X2	0x011	0	-495
	10V	-0.165	10.163	DAC2 to DAC2_RFB0_X2	0x010	0	495
	5V	-0.078	5.077	DAC2 to DAC2_RFB0_X1	0x001	0	0
	2.5V	-0.198	2.701	DAC2 to DAC2_RFB0_X1	0x000	3	-48
CH3	+/- 10V (Default)	-10.382	10.380	DAC3 to DAC3_RFB1	0x100	0	-245
	+/- 5V	-5.165	5.166	DAC3to DAC3_RFB1_X2	0x011	0	-495
	10V	-0.165	10.163	DAC3to DAC3_RFB1_X2	0x010	0	495
	5V	-0.078	5.077	DAC3 to DAC3_RFB1_X1	0x001	0	0
	2.5V	-0.198	2.701	DAC3 to DAC3_RFB1_X1	0x000	3	-48

Table 4: AD3552R Connections for Output Configuration

The AFE board connector provides an input/output interface to the EVAL-CN0585-FMCZ board. The interface provides connections to the analog IO, ADC/DAC gain settings, GPIO, I2C, SPI, aux power, and four direct FMC connections to allow system flexibility interfacing with custom AFE designs that are provided by ADI or can be custom designed by the user. Currently, ADI provides the EVAL-CN0584-EBZ as an analog front-end board.

The AFE board connector on the EVAL-CN0585-FMCZ board is a Samtec High-Density socket connector.

FMC LPC Connector Pinout for LLDK Board(Rev B)

FMC LPC connector routes the data acquired by the ADAQ23876 to FPGA and transfers the data from FPGA to AD3552R DAC.

Figure 6. FMC LPC Connector Pinout

LED Indicators

Once the board is connected to the host, and power is delivered, the green LED DS1 should be on.

Power Supply Considerations and Configuration

The Rev. B of the EVAL-CN0585-FMCZ board is powered through the USB-C connector of the board.

The board can also be powered from the FMC connector by adding resistor R9 and removing resistor R10, but it is not recommended as the current consumption exceeds the FMC standard current limit.

System Setup Using a ZedBoard

The EVAL-CN0585-FMCZ(Rev B) (connected to EVAL-CN0584-EBZ) is fully supported using a ZedBoard. For description of system setup and functionality using EVAL-CN0584-EBZ, EVAL-CN0585-FMCZ and ZedBoard, refer to CN0584 User Guide, System Setup Using a ZedBoard section.

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EVAL-CN0585-FMCZ User Guide