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This version (22 Jun 2022 03:14) was approved by Deferson Romero.The Previously approved version (16 Jun 2017 16:03) is available.Diff

EVALUATING THE AD9142A DIGITAL-TO-ANALOG CONVERTER

Preface

This user guide describes both the hardware and software setup needed to acquire data capture from AD9142A-M5372-EBZ / AD9142A-M5375-EBZ evaluation board to characterize AD9142A 16-bit, Dual, 1.6GSPS, TxDAC+® digital-to-analog converter. This guide shows how AD9142A-M5375-EBZ works with ADS7-V2/SDP-H1 controller board developed by Analog Devices. Link to the previous user guide document is provided for customers who still have the DPG2 controller board.

Typical Setup

Figure 1a. AD9142A-M5372-EBZ with SDP-H1 Setup

Figure 1b. AD9142A-M5372-EBZ with ADVS7-V2EBZ Setup

Tip: Click on any picture in this guide to open an enlarged version.

Helpful Files:

Software Needed:

Do not install ACE on a computer with DAC Software Suite.

Hardware Needed:

  • SDP-H1 (EVAL-SDP-CH1Z) Evaluation Kit / ADS7-V2EBZ Evaluation Kit
  • AD-DAC-FMC-ADP High-Speed DAC Evaluation Board to FMC Adaptor Board
  • PC with ACE and DPG Lite Software Applications
  • 5Vdc Power Supply
  • (2) Banana Plug Cables
  • High-Frequency Continuous Wave Generator
  • Signal/Spectrum Analyzer
  • USB-A to USB-Mini Cable
  • (2) SMA Cables
  • The following are included in SDP-H1 Evaluation Kit:
    • 12Vdc Wall Adapter
    • USB-A to USB-Mini Cable
  • The following are included in ADS7-V2 Evaluation Kit:
    • 12Vdc Power Supply
    • Power Cord
    • USB-A to USB-B Cable

Quick Start Guide

Jumpers for Selecting the DAC Output

Jumpers JP4, JP5, JP6, and JP7 select the output configuration. By default, the DAC output connected to the LPF and the ADL537x analog quadrature modulator. For selecting DAC output configuration, refer to Table 1 and Figure 2.

Table 1. Jumper Configurations for Viewing DAC Output and Modulator Output

Output Viewed SMA Output Jumper Configuration
DAC OutputJ3 (DAC1_Output) or J4 (DAC2_Output)JP4 and JP5 Pin 2 to Pin 3 (outer pads), JP6 and JP7 Pin 2 to Pin 3 (outer pads)
Modulator Output (Default)J6 (MOD_OUT)JP4 and JP5 Pin 1 to Pin 2 (inner pads), JP6 and JP7 Pin 1 to Pin 2 (inner pads)
DAC Output Configuration Modulator Output Configuration

Figure 2. AD9142A-M5372-EBZ/AD9142A-M5375-EBZ Output Configuration

Jumper for Selecting Clock Configuration

The AD9142A-M5372-EBZ / AD9142A-M5375-EBZ evaluates both the DAC outputs as well as the AQM outputs. Refer to Table 3 for clock configuration.

Table 3. Clock Configuration

Output Viewed Clock Input Local Oscillator Input
DAC OutputJ1 (CLKIN)
Modulator Output (Default)J1 (CLKIN)J15 (LO_IN)

Evaluation Guide

  1. Make sure that on AD9142A-M5375-EBZ, JP4, JP5, JP6, and JP7 are configured such that DAC output are connected to J3 (DAC1 OUTPUT) or J4 (DAC1 OUTPUT). Refer to Figure 2.
  2. Follow evaluation setup in Figure 1a and 1b.
    • Attach the evaluation board to SDP-H1/ADS7-V2EBZ connector using the AD-DAC-FMC-ADP adapter board.
    • Connect continuous wave generator for clock input to J1 (AD9516 CLK_IN).
    • Connect the DAC output from J3 (DAC1_P) or J8 (DAC2_P) to a signal/spectrum analyzer.
    • Connect the evaluation board to PC via USB and to a 5Vdc power supply via banana plug cables.
    • Connect SDP-H1/ADS7-V2EBZ to PC via USB and to a 12Vdc power supply.
    • Set clock input / continuous wave generator to 500MHz and 2dBm.
  3. Open ACE. The board will automatically be recognized by the software. Otherwise, install the plugin for AD9142A-M5375-EBZ evaluation board. Double click this board then modify the configuration, as shown in Figure 5, and click “Apply”.

    Figure 5. ACE Initial Configuration Wizard when using SDP-H1/ADS7-V2EBZ

  4. Open the DPGDownloaderLite. The evaluation board, controller board and DCO Frequency of around 250MHz will be automatically recognized by DPG.
  5. In DPGDownloaderLite, Add Generator Waveforms pulldown menu select Single Tone and apply the settings as shown in Figure 7. Set the Data Rate to 250MHz and Desired Frequency to 29 MHz. Set DAC Resolution to the DAC’s number of bits to 16 bits. Check the Generate Complex Data (I & Q) box and uncheck the Unsigned Data box.
  6. Select the in-phase tone from the I Data Vector pulldown menu and the quadrature tone from the Q Data Vector pulldown menu.

    Figure 7. DPGDownloader Waveform Configuration

  7. Press the download arrow and then the play button. The spectrum similar to Figure 8 should appear in the signal/spectrum analyzer.

    Figure 8. AD9142A-M5372-EBZ FFT for Fdac=500MHz,2x Interpolation Fout=29MHz

resources/eval/dpg/ad9142a-m5375-ebz.txt · Last modified: 22 Jun 2022 03:14 by Deferson Romero