This shows you the differences between two versions of the page.
Both sides previous revisionPrevious revisionNext revision | Previous revision | ||
resources:eval:user-guides:adin1300-and-adin1200:adin1300-ieee-compliance-test-mode-access [09 Feb 2022 13:14] – Initial Text Extry, Tables, formatting and Figures to follow Mark Bolger | resources:eval:user-guides:adin1300-and-adin1200:adin1300-ieee-compliance-test-mode-access [18 Feb 2022 13:18] (current) – Remove Prelim at top Mark Bolger | ||
---|---|---|---|
Line 2: | Line 2: | ||
====== Configuring the ADIN1300 for Ethernet PHY Compliance Test Modes ====== | ====== Configuring the ADIN1300 for Ethernet PHY Compliance Test Modes ====== | ||
+ | ===== Overview ===== | ||
- | <WRAP group> | + | The purpose of this application note is to describe the configuration of the ADIN1300 for the various Ethernet PHY compliance test modes as set out by IEEE802.3. |
- | <WRAP half column> | + | |
- | ====== Overview ====== | + | |
- | The purpose of this application note is to describe the configuration of the ADIN1300 for the various Ethernet PHY compliance test modes as set out by IEEE802.3. | ||
The ADIN1300 supports the IEEE test modes, Test Mode 1, Test Mode 2, Test Mode 3 and Test Mode 4 used for 1000BASE-T IEEE compliance testing. The ADIN1300 has some additional test modes that are useful for 10BASE-T and 100BASE-TX compliance testing. Details of the registers, sequences of writes are captured in this document. Use this application note in conjunction with the product datasheet. | The ADIN1300 supports the IEEE test modes, Test Mode 1, Test Mode 2, Test Mode 3 and Test Mode 4 used for 1000BASE-T IEEE compliance testing. The ADIN1300 has some additional test modes that are useful for 10BASE-T and 100BASE-TX compliance testing. Details of the registers, sequences of writes are captured in this document. Use this application note in conjunction with the product datasheet. | ||
- | ===== Testing Equipment and Setup ===== | + | ==== Testing Equipment and Setup ==== |
When performing this testing, user will need Ethernet compliance test fixture and associated Ethernet physical layer compliance software. There are a number of vendors provide Ethernet Compliance test equipment. For ADI in-house validation, we used Tektronix TDSET3 compliance software in addition to having UNH (University of New Hampshire perform compliance testing). | When performing this testing, user will need Ethernet compliance test fixture and associated Ethernet physical layer compliance software. There are a number of vendors provide Ethernet Compliance test equipment. For ADI in-house validation, we used Tektronix TDSET3 compliance software in addition to having UNH (University of New Hampshire perform compliance testing). | ||
+ | |||
Once equipment is in place and hardware powered and connected to the test fixture, configure the PHY through the MDIO interface to set the required test mode and use the compliance software to record and report the results. | Once equipment is in place and hardware powered and connected to the test fixture, configure the PHY through the MDIO interface to set the required test mode and use the compliance software to record and report the results. | ||
- | ===== Reset Between Tests ===== | + | ==== Reset Between Tests ==== |
To ensure the device is in a known state, either start from a power cycle or alternatively, | To ensure the device is in a known state, either start from a power cycle or alternatively, | ||
- | * GE_SFT_RST_CFG_EN.Write(0b1) | + | * GE_SFT_RST_CFG_EN.Write(0b1) |
- | * GE_SFT_RST. Write(0b1) | + | * GE_SFT_RST. Write(0b1) |
- | ===== Extended Register Addressing | + | ==== Extended Register Addressing ==== |
The ADIN1300 supports a range of extended management interface registers which can be accessed using Clause 45 access or alternatively using Clause 22 access through the EXT_REG_PTR (address 0x0010) and EXT_REG_DATA (address 0x0011), these registers provide user ability to read/write to the extended register space (any register greater than 0x001F) indirectly. | The ADIN1300 supports a range of extended management interface registers which can be accessed using Clause 45 access or alternatively using Clause 22 access through the EXT_REG_PTR (address 0x0010) and EXT_REG_DATA (address 0x0011), these registers provide user ability to read/write to the extended register space (any register greater than 0x001F) indirectly. | ||
If using Clause 22 access, write the 16-bit register address into the EXT_REG_PTR register and then read or write the EXT_REG_DATA register. | If using Clause 22 access, write the 16-bit register address into the EXT_REG_PTR register and then read or write the EXT_REG_DATA register. | ||
+ | ---- | ||
===== 1000BASE-T Testing ===== | ===== 1000BASE-T Testing ===== | ||
Line 42: | Line 42: | ||
This address corresponds to the MASTER-SLAVE Control register specified in clause 40.5.1.1 of IEEE Std 802.3. Only Test mode bits are show in table below, refer to datasheet register map for further detail. | This address corresponds to the MASTER-SLAVE Control register specified in clause 40.5.1.1 of IEEE Std 802.3. Only Test mode bits are show in table below, refer to datasheet register map for further detail. | ||
- | ADD TABLE | + | {{ : |
Line 52: | Line 52: | ||
- To verify the PHY transmitter output voltage droop is in range | - To verify the PHY transmitter output voltage droop is in range | ||
To configure the device in Test Mode 1, issue the following writes over MDIO | To configure the device in Test Mode 1, issue the following writes over MDIO | ||
- | MII_CONTROL.SFT_PD. Write(0b1) | + | * MII_CONTROL.SFT_PD. Write(0b1) |
- | MSTR_SLV_CONTROL.TST_MODE.Write(1) | + | |
- | MII_CONTROL.SFT_PD.Write(0b0) | + | |
==== TEST MODE 2 & 3 ==== | ==== TEST MODE 2 & 3 ==== | ||
Line 61: | Line 61: | ||
Note the ADIN1300 does not expose TX_TCLK directly. | Note the ADIN1300 does not expose TX_TCLK directly. | ||
To configure the device in Test Mode 2, issue the following writes over MDIO | To configure the device in Test Mode 2, issue the following writes over MDIO | ||
- | MII_CONTROL.SFT_PD. Write(0b1) | + | * MII_CONTROL.SFT_PD. Write(0b1) |
- | MSTR_SLV_CONTROL.TST_MODE.Write(2) | + | |
- | MII_CONTROL.SFT_PD.Write(0b0) | + | |
To configure the device in Test Mode 3, issue the following writes over MDIO | To configure the device in Test Mode 3, issue the following writes over MDIO | ||
- | MII_CONTROL.SFT_PD. Write(0b1) | + | * MII_CONTROL.SFT_PD. Write(0b1) |
- | MSTR_SLV_CONTROL.TST_MODE.Write(3) | + | |
- | MII_CONTROL.SFT_PD.Write(0b0) | + | |
Line 73: | Line 73: | ||
This test mode is used | This test mode is used | ||
- | To ensure the peak distortion is within the specified range. | + | - To ensure the peak distortion is within the specified range. |
- | To verify the return loss is above the specified attenuation. | + | |
- | To verify the PHYs common-mode rejection ratio is in range | + | |
To configure the device in Test Mode 4, issue the following writes over MDIO | To configure the device in Test Mode 4, issue the following writes over MDIO | ||
- | MII_CONTROL.SFT_PD. Write(0b1) | + | * MII_CONTROL.SFT_PD. Write(0b1) |
- | MSTR_SLV_CONTROL.TST_MODE.Write(4) | + | |
- | MII_CONTROL.SFT_PD.Write(0b0) | + | |
+ | ---- | ||
- | </ | ||
- | |||
- | <WRAP half column> | ||
- | |||
- | {{: | ||
- | ==== 100BASE-TX ==== | + | ===== 100BASE-TX |
For 100BASE-TX operation there are a variety of tests. There are two main test modes main register involved here is the B_100_TX_TST_MODE register at address 0xB413 (available via Clause 45 access) | For 100BASE-TX operation there are a variety of tests. There are two main test modes main register involved here is the B_100_TX_TST_MODE register at address 0xB413 (available via Clause 45 access) | ||
Line 98: | Line 94: | ||
This register provides the ability to transmit a 100BASE-TX test signal. | This register provides the ability to transmit a 100BASE-TX test signal. | ||
+ | {{ : | ||
To configure the device for 100BASE-TX VOD measurements, | To configure the device for 100BASE-TX VOD measurements, | ||
- | MII_CONTROL.Write(0x2900) | + | * MII_CONTROL.Write(0x2900) |
- | PHY_CTRL_1.AUTO_MDI_EN.Write(0b) | + | |
- | PHY_CTRL_1.MAN_MDIX.Write(0b0) | + | |
- | B_100_TX_TST_MODE.Write(1/ | + | |
- | PHY_CTRL_3. LINK_EN.Write(0b1) | + | |
- | MII_CONTROL.SFT_PD.Write(0b0) | + | |
+ | ---- | ||
- | === 10BASE-TE/ | + | ===== 10BASE-TE/ |
When operating in 10 Mbps speeds, the PHY is configured for 10BASE-Te transmit levels by default. 10BASE-T provides larger transmit levels and can be configured by clearing the B_10_E_EN register. | When operating in 10 Mbps speeds, the PHY is configured for 10BASE-Te transmit levels by default. 10BASE-T provides larger transmit levels and can be configured by clearing the B_10_E_EN register. | ||
The 10BASE-Te/T compliance tests are: | The 10BASE-Te/T compliance tests are: | ||
- | • Link Pulse Testing | + | * Link Pulse Testing |
- | • Medium Attachment Unit (MAU) | + | |
- | • TP_IDL | + | |
- | • Jitter | + | |
- | • Differential Voltage | + | |
- | • Harmonics | + | |
- | • Transmitter Return Loss | + | |
- | • Receiver Return Loss | + | |
- | • Common-Mode Voltage | + | |
The B_10_TX_TST_MODE register is used to select transmit test signals useful for 10BASE-T compliance testing. | The B_10_TX_TST_MODE register is used to select transmit test signals useful for 10BASE-T compliance testing. | ||
- | === 10BASE-T Transmit Test Mode Register === | + | ==== 10BASE-T Transmit Test Mode Register |
Address: 0xB412, Reset: 0x0000, Name: B_10_TX_TST_MODE | Address: 0xB412, Reset: 0x0000, Name: B_10_TX_TST_MODE | ||
This register provides the ability to transmit a 10BASE-T test signal. | This register provides the ability to transmit a 10BASE-T test signal. | ||
+ | |||
+ | {{ : | ||
To configure the device for 10BASE-T transmit test mode, consisting of 5MHz square wave on desired dimension, issue the following writes over MDIO | To configure the device for 10BASE-T transmit test mode, consisting of 5MHz square wave on desired dimension, issue the following writes over MDIO | ||
- | GE_SFT_RST_CFG_EN.Write(0b1) | + | * GE_SFT_RST_CFG_EN.Write(0b1) |
- | GE_SFT_RST. Write(0b1) | + | |
- | MII_CONTROL.SFT_RST. Write(0b1) | + | |
- | MII_CONTROL.Write(0x0900) | + | |
- | B_10_TX_TST_MODE.Write(0b100) | + | |
- | MII_CONTROL.SFT_PD.Write(0b0) | + | |
An alternative configuration, | An alternative configuration, | ||
- | GE_SFT_RST_CFG_EN.Write(0b1) | + | * GE_SFT_RST_CFG_EN.Write(0b1) |
- | GE_SFT_RST. Write(0b1) | + | |
- | MII_CONTROL.SFT_RST. Write(0b1) | + | |
- | MII_CONTROL.SFT_PD.Write(0b0) | + | |
- | PHY_CTRL_1.DIAG_CLK_EN.Write(0b1) | + | |
- | MII_CONTROL.LOOPBACK.Write(0b1) | + | |
- | PHY_CTRL_1.MAN_MDIX.Write(0b0) | + | |
- | PHY_CTRL_STATUS_1.LB_TX_SUP.Write(0b0) | + | |
- | PHY_CTRL_STATUS_1.LB_ALL_DIG_SEL.Write(0b1) | + | |
- | PHY_CTRL_3. LINK_EN.Write(0b1) | + | |
- | MII_CONTROL.SFT_PD.Write(0b0) | + | |
- | Wait for Link up | + | |
- | FG_CONT_MODE_EN.Write(0b1) | + | |
- | FG_CNTRL_RSTRT.FG_CNTRL.Write(1) | + | |
- | FG_EN.FG_EN.Write(1) | + | |
Setup for 10BASE-T forced mode in loopback with Tx suppression disabled, with transmission of frames with random payloads using the frame generator, | Setup for 10BASE-T forced mode in loopback with Tx suppression disabled, with transmission of frames with random payloads using the frame generator, | ||
- | FG_CNTRL_RSTRT.FG_CNTRL.Write(0b011) | + | * FG_CNTRL_RSTRT.FG_CNTRL.Write(0b011) |
- | FG_CNTRL_RSTRT.FG_CNTRL.Write(0b010) | + | |
- | FG_CNTRL_RSTRT.FG_CNTRL.Write(0b100) | + | |
- | FG_CNTRL_RSTRT.FG_CNTRL.Write(0b101) | + | |
10BASE-T is configured by writing the following register – include it in the sequence above if 10BASE-T operation is required. | 10BASE-T is configured by writing the following register – include it in the sequence above if 10BASE-T operation is required. | ||
- | B_10_E_EN.Write(0x0)// 10BASE-Te is enabled by default, write 0 to configure 10BASE-T. | + | * B_10_E_EN.Write(0x0) |
+ | ---- | ||
- | </ | ||
- | </ | ||
- | |||
- | ---- | + | ===== Testing Using ADI Evaluation |
- | <WRAP group> | + | |
- | <WRAP half column> | + | |
- | + | ||
- | ==== TESTING USING ADI EVALUATION | + | |
The ADI evaluation board uses small MDIO dongle board for USB to MDIO communications and the accompanying GUI provides access to the various Test modes from the “Test Mode” tab. Select the relevant test mode to configure and “Execute Test”. In the “Activity log” the register writes can be observed. | The ADI evaluation board uses small MDIO dongle board for USB to MDIO communications and the accompanying GUI provides access to the various Test modes from the “Test Mode” tab. Select the relevant test mode to configure and “Execute Test”. In the “Activity log” the register writes can be observed. | ||
- | + | {{ : | |
- | </ | + | |
- | </ | + | |
---- | ---- | ||
- | |||
- | |||
- | |||
- | <WRAP group> | ||
- | <WRAP half column> | ||
- | |||
- | |||
- | </ | ||
- | |||
- | <WRAP half column> | ||
- | |||
- | |||
- | |||
- | |||
- | |||
- | |||
- | </ | ||
- | </ | ||
- | |||
- | |||
- | <WRAP group> | ||
- | <WRAP half column> | ||
- | |||
- | |||
- | </ | ||
- | |||
- | <WRAP half column> | ||
- | |||
- | |||
- | |||
- | |||
- | </ | ||
- | </ | ||