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resources:eval:user-guides:ad-fmcomms11-ebz:hardware [14 Feb 2019 03:35] – [Downloads] erbe reyta | resources:eval:user-guides:ad-fmcomms11-ebz:hardware [09 Mar 2023 02:43] (current) – updated the design files download link Joyce Velasco | ||
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====== AD-FMCOMMS11-EBZ Hardware ====== | ====== AD-FMCOMMS11-EBZ Hardware ====== | ||
- | ===== Downloads | + | ===== Schematic, PCB Layout, Bill of Materials |
<WRAP round download> | <WRAP round download> | ||
+ | [[adi> | ||
+ | * Schematic | ||
+ | * PCB Layout | ||
+ | * Bill of Materials | ||
+ | * Allegro Project (get the [[https:// | ||
+ | </ | ||
+ | |||
+ | ===== Picture and Main components ===== | ||
- | * {{: | + | ==== Top Layer Main components ==== |
- | * {{: | + | |
- | * {{ : | + | |
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- | * {{: | + | |
+ | {{ : | ||
+ | ==== Bottom Layer Main components ==== | ||
+ | {{ : | ||
+ | ===== Outline ===== | ||
- | * {{: | + | For those that don't want to load up the Allegro |
+ | ===== Size ===== | ||
- | ===== I/O Voltage ===== | + | The size of the board (not including the SMA connectors, which project beyond the edge of the board) is 110mm x 69mm. The mounting holes align with the carrier card (EK-Z7-ZC706-G), |
+ | {{ : | ||
- | The AD-FMComms5 (AD9361) assumes a VDD_INTERFACE voltage between 1.71V and 2.625V (1.8 to 2.5 +/- 5%), so on your FPGA carrier board, you should ensure that V< | ||
- | ===== Phase Synchronization | + | ===== Layers |
- | Traces between baluns and SMAs are not phase matched on REV-A and REV-B which can cause phase misalignment with the libad9361-iio ad9361_fmcomms5_phase_sync solution. This is corrected on REV-C. Therefore, phase alignment performance can vary over frequency. The RF switches on REV-A/B are also not designed to work above 900 MHz. Higher frequency switches are available on REV-C. | + | The AD-FMCOMMS11-EBZ is a 12 layer board. |
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+ | {{navigation AD-FMCOMMS11-EBZ|# | ||