This version (15 Feb 2022 02:25) was approved by Melissa Lorenz Lacanlale.The Previously approved version (15 Feb 2022 02:18) is available.Diff



This user guide describes both the hardware and software setup needed to acquire data capture from AD9776A-DPG2-EBZ/AD9778A-DPG2-EBZ/AD9779A-DPG2-EBZ evaluation board to characterize AD9776A/AD9778A/AD9779A 12-/14-/16- bit 1GSPS high-speed digital-to-analog converter.

This guide shows how AD977xA-DPG2-EBZ works with SDP-H1 controller board developed by Analog Devices. Link to the previous user guide document is provided for customers who still have DPG2 and DPG3 controller boards.

Typical Setup

Figure 1. EVAL-AD977xA Evaluation Setup

Tip: Click on any picture in this guide to open an enlarged version.

Helpful Files

Software Needed:

Known Issue: ACE may fail to detect HS-DAC boards, details here.

Hardware Needed:

  • SDP-H1 (EVAL-SDP-CH1Z) Board
  • 12Vdc 1A Wall Adapter for SDP-H1
  • 5Vdc 1A power supply (banana plug) for the evaluation board.
  • AD-DAC-FMC-ADP High-Speed DAC Evaluation Board to FMC Adaptor Board
  • PC with ACE and DPG Lite Software Applications
  • High-Frequency Continuous Wave Generator (Clock Source)
  • Signal/Spectrum Analyzer
  • (2) USB A to USB Mini Cables
  • (2) SMA Cables

Quick Start Guide

  1. Attach AD9776A-DPG2-EBZ/AD9778A-DPG2-EBZ/AD9779A-DPG2-EBZ to SDP-H1 FMC connector using the AD-DAC-FMC-ADP adapter board.
  2. Connect SDP-H1 to PC via USB and to a 12V 1A power supply.
  3. Connect the evaluation board to PC via USB and to a 5Vdc 1A power supply on P4 and P5. Refer to Figure 1.
  4. Connect continuous wave generator for clock input to SMA J2 DAC_CLK/DAC_CLK_P and DAC output from SMA J4 (IOUT1P) or SMA J8 (IOUT2P) to a signal/spectrum analyzer.
  5. Set clock input to 400MHz, 3dBm.
  6. Open ACE. The board will be automatically recognized by the software. Click the plugin. Otherwise, install the ACE plugin for AD977xA.

    Figure 2. AD9779A Plugin

  7. To change the settings of the AD977xA chip, double click on the AD977xA block on the board view to access the chip. The default values for the register is displayed and set. The values can be changed on the Chip View GUI, or on the Memory Map for registers not available in the GUI. For more info on the memory map, refer to AD977XA datasheet. Once the desired values are set, Click Apply Changes and then Read All on the upper right window.

    Figure 3. Apply Changes and Read All button

  8. Apply the values in the Initial Configuration wizard as shown in Figure 4.

    Figure 4. AD9779A Initial Configuration Window

  9. Start DPG Downloader Lite. At the SDP-H1 part of the software, the device part number and clock frequency should be displayed.

    Figure 5. DPG Lite Session for EVAL-AD9779A

  10. In DPG Downloader Lite, from the Add Generator Waveforms pulldown menu select Single Tone and apply the settings as shown in Figure 5. Set the Data Rate to 100MHz and Desired Frequency to 10.2MHz. Uncheck the Unsigned Data box and Check the Generate Complex Data (I & Q).
  11. Select the I/Q tone from the I/Q Data Vector pulldown menu.
  12. Press the download arrow and then the play button. The spectrum similar to Figure 6 should appear in the signal/spectrum analyzer.

    Figure 6. Spectrum Output for AD9779A; Fdac = 100MSPS, Fout = 10.2MHz

Using the AD9516 as clock source

By default, solder jumpers JP5 and JP6 are configured to drive the AD977xA clock inputs directly by SMA J2. This jumper setting is shown on Figure 7a. The AD9516 is included so the user can test the performance (e.g. ACLR) with the AD9516 clock multiplication.

  1. To use the AD9616 to drive the clock inputs, the solder jumpers should be reconfigured as shown in Figure 7b. Connect continuous wave generator for clock input to SMA J1 (REF_CLK_IN). Set to 100MHz, 3dBm output.

    Figure 7a (left). Direct Clock Configuration; Figure 7b (right) AD9516 Clock Configuration

  2. On the ACE Initial Configuration window, apply the following values shown on Figure 8.

    Figure 8. Settings for using AD9516 as clock source

  3. Make sure that the PLL Lock LED on the ACE GUI and the LD LED on the evaluation board are lit up.

    Figure 9. LD and PLL Lock LED

  4. Proceed with the DPG Lite procedure above.

Using the ADL5375 Modulator

By default, solder jumpers JP1, JP2, JP3, and JP4 are configured to route the DAC outputs to SMA J4 (IOUT1P) and to J8 (IOUT2P). This jumper setting is shown on Figure 10a. To connect the DAC output to the filter that feeds into the ADL5375, the solder jumpers should be reconfigured as shown in Figure 7b. Source the desired LO of the modulator (e.g. 900 or 1800MHz, 3dBm) on SMA J19 (LO IN). The ADL5375 Modulator output can be observed on SMA J6 (RF OUT).

Figure 10a (left). DAC Output Configuration; Figure 10b (right) Modulator Output Configuration


This section lists items to check and practices to use when debugging any unexpected performance of a board. If unexpected results occur:

  • Check the voltage rails of the evaluation board. P4, P5, and TP4 should be 5V; TP6, TP8, and TP16 should be 3.3V; TP1 and TP3 should be 1.8V.
  • Check if all (3) blue LEDs on the AD-DAC-FMC-ADP board is lit up. Reconnect the board to the FMC connector of SDP-H1 if not lit up.
  • Check if the SDP-H1 is being supplied properly by 12Vdc adaptor. Some LEDs on the SDP-H1 should lit up.
  • Perform a chip reset by pressing S2 on the AD977xA evaluation board.
  • Power cycle both the SDP-H1 and the AD977xA evaluation board.
  • Probe C76 and C78 to make sure a clock signal is being sent into the DAC.
  • Check if XD1 is lit up on the evaluation board. Reconnect/replace the USB cable connection to the evaluation board if it's not lit up.
  • Disconnect and reconnect the SDP-H1 and AD977xA evaluation board. Reopen ACE and DPG Lite software.
resources/eval/dpg/eval-ad977xa.txt · Last modified: 15 Feb 2022 02:25 by Melissa Lorenz Lacanlale