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university:courses:electronics:electronics-lab-scr [07 Feb 2022 15:16] – [Activity: Silicon Controlled Rectifiers (SCR)] Doug Mercer | university:courses:electronics:electronics-lab-scr [27 May 2022 21:00] (current) – [LATCH-UP] Doug Mercer | ||
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Latch-up is a potentially destructive situation in which a parasitic SCR is triggered, shorting the | Latch-up is a potentially destructive situation in which a parasitic SCR is triggered, shorting the | ||
- | positive and negative supplies together. If current flow is not limited, electrical | + | positive and negative supplies together. If current flow is not limited, electrical |
occur. The classic case of latch-up occurs in CMOS output devices, in which the driver transistors and | occur. The classic case of latch-up occurs in CMOS output devices, in which the driver transistors and | ||
wells form a four layer PNPN SCR structure when one of the two parasitic base-emitter junctions is | wells form a four layer PNPN SCR structure when one of the two parasitic base-emitter junctions is | ||
- | momentarily forward biased during an overvoltage | + | momentarily forward biased during an over-voltage |
short between the V< | short between the V< | ||
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<WRAP centeralign> | <WRAP centeralign> | ||
- | Proper design methods to reduce the possiblility | + | Proper design methods to reduce the possibility |
- | NMOS and PMOS devices and interposing highly doped regions | + | NMOS and PMOS devices and interposing highly doped regions |
these kinds of layout approaches attempt to lower the ß of either the vertical PNP or the lateral NPN | these kinds of layout approaches attempt to lower the ß of either the vertical PNP or the lateral NPN | ||
parasitic bipolar transistors to less than 1. Some of these methods also tend to lower the resistance of | parasitic bipolar transistors to less than 1. Some of these methods also tend to lower the resistance of | ||
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</ | </ | ||
- | **For Further Reading:** | + | =====The Programmable UJT (PUT)===== |
- | http://en.wikipedia.org/ | + | The Programmable unijunction transistor or PUT is a close relative of other four layer devices in the thyristor family. Its has a four layered construction just like the SCR and has three terminals named anode(A), cathode(K) and gate(G) again like the thyristors. Background and example circuits that use the PUT can be found in this [[: |
- | [[adi> | + | **For Further Reading:** |
+ | [[http:// | ||
+ | [[adi> | ||
[[adi> | [[adi> | ||