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resources:tools-software:uc-drivers:ad463x [21 Apr 2022 18:42] – [Driver Description] Clarence MAYOTT | resources:tools-software:uc-drivers:ad463x [22 Apr 2022 05:21] – [Overview] Clarence MAYOTT | ||
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===== Supported Devices ===== | ===== Supported Devices ===== | ||
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The [[adi> | The [[adi> | ||
- | A low-drift, internal precision reference buffer eases voltage reference sharing with other system circuitry. The AD4630-24 offers a typical dynamic range of 106 dB when using a 5 V reference. The low noise floor enables signal chains requiring less gain and lower power. A block averaging filter with programmable decimation ratio can increase dynamic range up to 153 dB. The wide differential input and common mode ranges allow inputs to use the full ±VREF range without saturating, simplifying signal conditioning requirements and system calibration. The improved settling of the Easy Drive analog inputs broadens the selection of analog front-end components compatible with the [[adi> | + | A low-drift, internal precision reference buffer eases voltage reference sharing with other system circuitry. The AD4630-24 offers a typical dynamic range of 106 dB when using a 5 V reference. |
The versatile Flexi-SPI serial interface eases host processor and ADC integration. A wide data clocking window, multiple SDO lanes, and optional DDR data clocking can reduce the serial clock to 10 MHz while operating at a sample rate of 2 MSPS. Echo clock mode and ADC master clock mode relax the timing requirements and simplify the use of digital isolators. | The versatile Flexi-SPI serial interface eases host processor and ADC integration. A wide data clocking window, multiple SDO lanes, and optional DDR data clocking can reduce the serial clock to 10 MHz while operating at a sample rate of 2 MSPS. Echo clock mode and ADC master clock mode relax the timing requirements and simplify the use of digital isolators. |