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resources:tools-software:linux-drivers:iio-pll:ad9528 [11 Feb 2016 20:58] – [Status] Lars-Peter Clausen | resources:tools-software:linux-drivers:iio-pll:ad9528 [24 May 2019 14:55] (current) – [Device tree example] Michael Hennerich | ||
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The AD9528 generates two outputs (Output 1 and Output 2) with a maximum frequency of 1.25 GHz, and 12 outputs up to | The AD9528 generates two outputs (Output 1 and Output 2) with a maximum frequency of 1.25 GHz, and 12 outputs up to | ||
1 GHz. Each output can be configured to output directly from PLL1, PLL2, or the internal SYSREF generator. Each of the 14 output channels contains a divider with coarse digital phase adjustment and an analog fine phase delay block that allows complete flexibility in timing alignment across all 14 outputs. | 1 GHz. Each output can be configured to output directly from PLL1, PLL2, or the internal SYSREF generator. Each of the 14 output channels contains a divider with coarse digital phase adjustment and an analog fine phase delay block that allows complete flexibility in timing alignment across all 14 outputs. | ||
+ | |||
+ | Please see also here: [[resources: | ||
{{ : | {{ : | ||
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^ Source ^ Mainlined? ^ | ^ Source ^ Mainlined? ^ | ||
- | | [[linux.github> | + | | [[linux.github> |
===== Files ===== | ===== Files ===== | ||
^ Function ^ File ^ | ^ Function ^ File ^ | ||
- | | driver | + | | driver |
- | | include | [[linux.github> | + | | include | [[linux.github> |
- | | include | [[linux.github> | + | | include | [[linux.github> |
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* **adi, | * **adi, | ||
* **adi, | * **adi, | ||
- | * **adi,pll2-ndiv-a-cnt**: PLL2 Feedback N divider, counter A (range 0..4) | + | * **adi,pll2-m1-frequency**: Distribution clock frequency |
- | * **adi,pll2-ndiv-b-cnt**: PLL2 Feedback N divider, counter B (range 0..63) | + | |
* **adi, | * **adi, | ||
* **adi, | * **adi, | ||
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/* PLL2 config */ | /* PLL2 config */ | ||
- | adi, | + | |
- | adi,pll2-ndiv-b-cnt = <25>; | + | * Valid ranges based on VCO locking range: |
- | adi,pll2-vco-diff-m1 = <4>; | + | * |
- | adi,pll2-r1-div = <2>; | + | * 862.500 MHz - 1006.250 MHz |
- | adi,pll2-n2-div = <25>; | + | * 690.000 MHz - |
+ | */ | ||
+ | |||
+ | adi,pll2-m1-frequency | ||
adi, | adi, | ||