Wiki

Analog Devices Wiki

English
English
简体中文
简体中文
日本語
日本語
Руccкий
Руccкий

Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revisionPrevious revision
Next revision		Previous revision
resources:quick-start:ad5689r [07 Feb 2013 17:07] – [Simple Write: Example 3] Padraic O Reillyresources:quick-start:ad5689r [23 May 2013 18:40] (current) – add +/- signs, consolidate NC pin descriptions Yuet Ng
Line 2: Line 2:
 ====== AD5689R/AD5687R Quick Start Guide ====== ====== AD5689R/AD5687R Quick Start Guide ======
 ** Dual, 16-/12-Bit, Voltage Output DACs with a 2 ppm/ºC Reference, SPI Interface ** ** Dual, 16-/12-Bit, Voltage Output DACs with a 2 ppm/ºC Reference, SPI Interface **
-{{ :resources:quick-start:11256-001.png |}} 
- 
- 
 ===== Features ===== ===== Features =====
-  * High relative accuracy (INL): ±2 LSB maximum (16-bit)+  * High relative accuracy (INL): ±2 LSB maximum (16-bit [[adi>ad5689r|AD5689R]])
   * Low drift 2.5 V on-chip reference: 2 ppm/°C typical temperature coefficient   * Low drift 2.5 V on-chip reference: 2 ppm/°C typical temperature coefficient
   * Tiny 3 mm × 3 mm 16-lead LFCSP  or 16-lead TSSOP package   * Tiny 3 mm × 3 mm 16-lead LFCSP  or 16-lead TSSOP package
-  * Total unadjusted error (TUE): 0.1 % of FSR maximum +  * Total unadjusted error (TUE): ±0.1% of FSR maximum 
-  * Offset error: 1.5 mV maximum +  * Offset error: ±1.5 mV maximum 
-  * Gain error: 0.1% of FSR maximum+  * Gain error: ±0.1% of FSR maximum
   * High drive capability: 20 mA, 0.5 V  from supply rails    * High drive capability: 20 mA, 0.5 V  from supply rails 
   * User selectable gain of 1 or 2 (GAIN pin)   * User selectable gain of 1 or 2 (GAIN pin)
   * Reset to zero scale or midscale (RSTSEL pin)   * Reset to zero scale or midscale (RSTSEL pin)
   * 1.8 V logic compatibility   * 1.8 V logic compatibility
-  * 50 MHz SPI interface +  * 50 MHz serial peripheral interface (SPI) 
-  * 2.7 V to 5.5 V power supply+  * 2.7 V to 5.5 V power supply 
   * −40°C to +105°C temperature range   * −40°C to +105°C temperature range
 +
 +=====Functional Block Diagram=====
 +{{ :resources:quick-start:11256-001.png |}}
 +<WRAP centeralign>//Figure 1.//</WRAP>
 +
 ===== Pin Configurations ===== ===== Pin Configurations =====
 \\ \\
Line 33: Line 35:
 |V<sub>OUT</sub>A  | Analog output voltage from DAC A.| |V<sub>OUT</sub>A  | Analog output voltage from DAC A.|
 |V<sub>OUT</sub>B  | Analog output voltage from DAC B.| |V<sub>OUT</sub>B  | Analog output voltage from DAC B.|
-|NC                | Not Connected | +|NC                | No connect. Do not connect to these pins. |
-|NC                | Not Connected |+
 |<m>overline{SYNC}</m>   | Connect to serial interface.   | |<m>overline{SYNC}</m>   | Connect to serial interface.   |
 |SCLK   | Connect to serial interface.   | |SCLK   | Connect to serial interface.   |
Line 44: Line 45:
 |<m>overline{LDAC}</m>   | Tie low.  | |<m>overline{LDAC}</m>   | Tie low.  |
 |RSTSEL | Tie to GND to power up to zero scale.| |RSTSEL | Tie to GND to power up to zero scale.|
-|GAIN   | Tie to GND. DAC outputs have a span from 0 V to V<sub>REF</sub>. If tied to V<sub>LOGIC</sub> outputs have a span of 0V to 2V<sub>REF</sub>|+|GAIN   | Tie to GND. DAC outputs have a span from 0 V to V<sub>REF</sub>. If GAIN is tied to V<sub>LOGIC</sub>, outputs have a span of 0 V to 2 V<sub>REF</sub>.|
 |<m>overline{RESET}</m>  | Tie high. | |<m>overline{RESET}</m>  | Tie high. |
 |V<sub>LOGIC</sub> | Connect to serial interface supply voltage.| |V<sub>LOGIC</sub> | Connect to serial interface supply voltage.|
 \\ \\
 \\ \\
-===== Shift Register Contents =====+===== Input Shift Register Contents =====
 \\ \\
 {{ :resources:quick-start:11256-045.png? |}}\\ {{ :resources:quick-start:11256-045.png? |}}\\
-<WRAP CENTERALIGN>//Figure 4. Shift Register Contents(AD5689R)//</WRAP>+<WRAP CENTERALIGN>//Figure 4. Input Shift Register Contents ([[adi>ad5689r|AD5689R]])//</WRAP>
  
 **Table 2. Command Definitions** **Table 2. Command Definitions**
Line 58: Line 59:
 ^C3 ^C2 ^C1 ^C0 ^Description ^ ^C3 ^C2 ^C1 ^C0 ^Description ^
 |0 |0 |0 |0 |No operation| |0 |0 |0 |0 |No operation|
-|0 |0 |0 |1 |Write to Input Register n (Dependent on LDAC)|+|0 |0 |0 |1 |Write to Input Register n (dependent on <m>overline{LDAC}</m>)|
 |0 |0 |1 |0 |Update DAC Register n with contents of Input Register n| |0 |0 |1 |0 |Update DAC Register n with contents of Input Register n|
 |0 |0 |1 |1 |Write to and update DAC Channel n| |0 |0 |1 |1 |Write to and update DAC Channel n|
Line 75: Line 76:
  <m>V_OUT = V_REF * Gain delim{[}{D/2^N}{]}</m>\\  <m>V_OUT = V_REF * Gain delim{[}{D/2^N}{]}</m>\\
 where:\\  where:\\ 
-//D// is the decimal equivalent. \\ +//D// is the decimal equivalent of the binary code that is loaded to the DAC register. \\ 
 //N// is the number of bits. \\  //N// is the number of bits. \\ 
 \\ \\
 \\ \\
 ==== Simple Write: Example 1 ==== ==== Simple Write: Example 1 ====
-<WRAP tip>To update Channel A, write the following over the serial interface: 0001 XXX1 1000000000000000 +<WRAP tip>To update Channel A, write the following over the serial interface: 0001 0001 1000000000000000 
 (four command bits, four address bits, 16 data bits for the [[adi>ad5689r|AD5689R]]).\\ (four command bits, four address bits, 16 data bits for the [[adi>ad5689r|AD5689R]]).\\
 This updates Channel A to midscale. This updates Channel A to midscale.
Line 92: Line 93:
 ==== Simple Write: Example 2 ==== ==== Simple Write: Example 2 ====
 <WRAP tip>To update both Channel A and Channel B, write the following over the serial interface: <WRAP tip>To update both Channel A and Channel B, write the following over the serial interface:
-0001 1001 1111111111111111. This updates both channels to full scale. GAIN = 1, V<sub>OUT</sub>B = 2.5 V, V<sub>OUT</sub>A = 2.5 V.</WRAP>+0001 1001 1000000000000000. This updates both channels to full scale. GAIN = 1, V<sub>OUT</sub>B = 2.5 V, V<sub>OUT</sub>A = 2.5 V.</WRAP>
  
 {{ :resources:quick-start:example_2.png?  800X160 |}}\\ {{ :resources:quick-start:example_2.png?  800X160 |}}\\
 <WRAP CENTERALIGN>//Figure 7. Simple Write—Update Channel A and Channel B//</WRAP> <WRAP CENTERALIGN>//Figure 7. Simple Write—Update Channel A and Channel B//</WRAP>
 +//
 +//
resources/quick-start/ad5689r.txt · Last modified: 23 May 2013 18:40 by Yuet Ng

Page Tools