This shows you the differences between two versions of the page.
Both sides previous revisionPrevious revisionNext revision | Previous revisionNext revisionBoth sides next revision | ||
resources:fpga:xilinx:interposer:ad5541a [28 Sep 2012 10:50] – Added common section for describing the evaluation setup and System Demonstration Platform Adrian Costina | resources:fpga:xilinx:interposer:ad5541a [06 Sep 2013 15:50] – added link to EDK KC705 reference project on Github Lucian Sin | ||
---|---|---|---|
Line 12: | Line 12: | ||
====== Overview ====== | ====== Overview ====== | ||
- | This document presents the steps to setup an environment for using the **[[adi> | + | This document presents the steps to setup an environment for using the **[[adi> |
{{ : | {{ : | ||
Line 30: | Line 30: | ||
* {{resources: | * {{resources: | ||
* [[http:// | * [[http:// | ||
- | * [[http:// | ||
====== Getting Started ====== | ====== Getting Started ====== | ||
- | The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation | + | The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the reference |
===== Required Hardware ===== | ===== Required Hardware ===== | ||
Line 40: | Line 39: | ||
* [[http:// | * [[http:// | ||
* FMC-SDP adapter board | * FMC-SDP adapter board | ||
- | * **EVAL-AD5541A** evaluation board | + | * **EVAL-AD5541ASDZ** evaluation board |
===== Required Software ===== | ===== Required Software ===== | ||
- | * Xilinx ISE 13.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack). | + | * Xilinx ISE 14.6. |
- | * [[http://micrium.com/ | + | * UART Terminal (Termite/Tera Term/Hyperterminal), |
+ | * The EVAL-AD5541A reference project for Xilinx KC705 FPGA. | ||
===== Downloads ===== | ===== Downloads ===== | ||
+ | <WRAP round download 80%> | ||
+ | \\ | ||
+ | * {{: | ||
+ | * **AD5541A Driver:** https:// | ||
+ | * **AD5541A Commands:** https:// | ||
+ | * **Xilinx Boards Common Drivers:** https:// | ||
+ | * **EDK KC705 Reference project:** https:// | ||
+ | \\ | ||
+ | </ | ||
+ | ====== Run the Demonstration Project ====== | ||
- | * {{: | + | ===== Hardware setup ===== |
- | The following table presents a short description the reference design archive contents. | + | <WRAP round important 80%> |
- | + | \\ | |
- | ^ **Folder** ^ **Description** ^ | + | Before connecting |
- | | Bit | Contains | + | </ |
- | | Microblaze | Contains the EDK 13.4 project for the Microblaze softcore | + | |
- | | Software | Contains the source files of the software project that will be run by the Microblaze processor.| | + | |
- | | uCProbeInterface | Contains the uCProbe interface and the .elf symbols file used by uC-Probe | + | |
- | + | ||
- | ====== Run the Demonstration Project ====== | + | |
- | {{page> | + | * Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector. |
+ | * Connect the JTAG and UART cables to the KC705 and power up the FPGA board. | ||
- | ===== Demonstration Project User Interface | + | ===== Quick start evaluation |
+ | For a quick start evaluation, run the **download.bat** script located in the **SDK/ | ||
- | The following figure presents the **uC-Probe** interface | + | <WRAP round info 80%> |
+ | \\ | ||
+ | The **download.bat** script assumes | ||
+ | </ | ||
- | {{ :resources:fpga: | + | If programming was successful, you should be seeing the command messages appear on the terminal. |
+ | ===== Reference Project Overview ===== | ||
+ | The following commands were implemented in this version of EVAL-AD5541A reference project for Xilinx KC705 FPGA board. | ||
+ | ^ Command ^ Description ^ | ||
+ | | **help?** | Displays all available commands. | | ||
+ | | **voltage=** | Sets the DAC output voltage. Accepted values:\\ 0 .. 2500 - desired output voltage in milivolts. | | ||
+ | | **voltage? | ||
+ | | **register=** | Writes to the DAC register. Accepted values:\\ 0 .. 65535 - the value written to the DAC. | | ||
+ | | **register?** | Displays last written value in the DAC register. | | ||
- | * The communication with the board is activated / deactivated by toggling the **// | + | Commands can be executed using a serial terminal connected |
- | * The **//DAC//** switch is used to enable/ | + | |
- | * The **// | + | |
- | * The **//DAC Value//** slider is used to set the value to be loaded into the DAC register. The selected value is displayed in the numeric box next to the slider. | + | |
- | ===== Troubleshooting ===== | + | The following image shows a generic list of commands in a serial terminal connected to Xilinx KC705 FPGA's UART peripheral. |
+ | {{ : | ||
- | In case there is a communication problem with the board the follwing actions can be perfomed in order to try to fix the issues: | + | ===== Software Project Setup ===== |
- | * Check that the evaluation board is powered as instructed in the board' | + | {{page> |
- | * In uC-Probe refresh the symbols file by right-clicking on the **//System Browser//** window and selecting **//Refresh Symbols// | + | |
- | * If the communication problem persists even after performing the previous steps, restart the uC-Probe application and try to run the interface again. | + | |
====== More information ====== | ====== More information ====== | ||
* [[resources: | * [[resources: | ||
{{page> | {{page> |