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| resources:fpga:peripherals:jesd204 [19 Mar 2021 08:49] – [Linux] Michael Hennerich | resources:fpga:peripherals:jesd204 [25 Mar 2024 08:30] (current) – Update license link Paul Pop |
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| ===== How to Obtain a License ===== | ===== How to Obtain a License ===== |
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| When customers and partners download software from github, or e-mail downloaded software to someone, they are obligated to comply to the terms and conditions of the [[https://github.com/analogdevicesinc/hdl/blob/master/library/jesd204/README.md|Software License Agreement]]. The core is released under two difference licenses. You may choose either: | When customers and partners download software from github, or e-mail downloaded software to someone, they are obligated to comply to the terms and conditions of the [[https://github.com/analogdevicesinc/hdl/blob/main/LICENSE_ADIJESD204|Software License Agreement]]. The core is released under two difference licenses. You may choose either: |
| * Commercial licenses may be purchased from Analog Devices, Inc. or any authorized distributor by ordering [[adi>en/design-center/evaluation-hardware-and-software/jesd204-interface-framework.html|IP-JESD204]]. This will allow you to use the core in a closed system. | * Commercial licenses may be purchased from Analog Devices, Inc. or any authorized distributor by ordering [[adi>en/design-center/evaluation-hardware-and-software/jesd204-interface-framework.html|IP-JESD204]]. This will allow you to use the core in a closed system. |
| * GPL 2, this allows you to use the core for any purpose, but you must release anything else that links to the JESD204 core (this would normally be your algorithmic IP). You do not need to sign anything purchase anything to use the JESD204 core under the GPL license. | * GPL 2, this allows you to use the core for any purpose, but you must release anything else that links to the JESD204 core (this would normally be your algorithmic IP). You do not need to sign anything purchase anything to use the JESD204 core under the GPL license. |
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| ==== No-OS ==== | ==== No-OS ==== |
| | * [[resources:tools-software:uc-drivers:jesd204:axi_adxcvr|ADI JESD204B/C AXI_ADXCVR Highspeed Transceivers No-OS Driver]] |
| | * [[resources:tools-software:uc-drivers:jesd204:axi_jesd204_rx|ADI JESD204B/C Receive Peripheral No-OS Driver]] |
| | * [[resources:tools-software:uc-drivers:jesd204:axi_jesd204_tx|ADI JESD204B/C Transmit Peripheral No-OS Driver]] |
| | * [[resources:tools-software:uc-drivers:jesd204:axi_adc_core|AXI ADC No-OS Driver]] |
| | * [[resources:tools-software:uc-drivers:jesd204:axi_dac_core|AXI DAC No-OS Driver]] |
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| ===== Tutorial ===== | ===== Tutorial ===== |
| * [[https://github.com/analogdevicesinc/hdl/tree/master/projects/fmcomms11/zc706| Xilinx ZC706]] | * [[https://github.com/analogdevicesinc/hdl/tree/master/projects/fmcomms11/zc706| Xilinx ZC706]] |
| * [[:resources:eval:user-guides:ad-fmcdaq2-ebz|AD-FMCDAQ2-EBZ Reference Design]] | * [[:resources:eval:user-guides:ad-fmcdaq2-ebz|AD-FMCDAQ2-EBZ Reference Design]] |
| * [[https://github.com/analogdevicesinc/hdl/tree/master/projects/daq2/a10gx | Intel A10GX]] | |
| * [[https://github.com/analogdevicesinc/hdl/tree/master/projects/daq2/a10soc | Intel A10SOC]] | * [[https://github.com/analogdevicesinc/hdl/tree/master/projects/daq2/a10soc | Intel A10SOC]] |
| * [[https://github.com/analogdevicesinc/hdl/tree/master/projects/daq2/kc705 | Xilinx KC705]] | * [[https://github.com/analogdevicesinc/hdl/tree/master/projects/daq2/kc705 | Xilinx KC705]] |
| * [[https://github.com/analogdevicesinc/hdl/tree/master/projects/daq2/zcu102 | Xilinx ZCU102]] | * [[https://github.com/analogdevicesinc/hdl/tree/master/projects/daq2/zcu102 | Xilinx ZCU102]] |
| * [[:resources:eval:user-guides:ad-fmcdaq3-ebz|AD-FMCDAQ3-EBZ Reference Design]] | * [[:resources:eval:user-guides:ad-fmcdaq3-ebz|AD-FMCDAQ3-EBZ Reference Design]] |
| * [[https://github.com/analogdevicesinc/hdl/tree/master/projects/daq3/a10gx | Intel A10GX]] | |
| * [[https://github.com/analogdevicesinc/hdl/tree/master/projects/daq3/kcu105 | Xilinx KCU105]] | * [[https://github.com/analogdevicesinc/hdl/tree/master/projects/daq3/kcu105 | Xilinx KCU105]] |
| * [[https://github.com/analogdevicesinc/hdl/tree/master/projects/daq3/vcu118| Xilinx VCU118]] | * [[https://github.com/analogdevicesinc/hdl/tree/master/projects/daq3/vcu118| Xilinx VCU118]] |
| * [[https://github.com/analogdevicesinc/hdl/tree/master/projects/daq3/zcu102 | Xilinx ZCU102]] | * [[https://github.com/analogdevicesinc/hdl/tree/master/projects/daq3/zcu102 | Xilinx ZCU102]] |
| * [[:resources:eval:user-guides:mykonos|ADRV9371 Reference Design]] | * [[:resources:eval:user-guides:mykonos|ADRV9371 Reference Design]] |
| * [[https://github.com/analogdevicesinc/hdl/tree/master/projects/adrv9371x/a10gx| Intel A10GX]] | |
| * [[https://github.com/analogdevicesinc/hdl/tree/master/projects/adrv9371x/a10soc| Intel A10SOC]] | * [[https://github.com/analogdevicesinc/hdl/tree/master/projects/adrv9371x/a10soc| Intel A10SOC]] |
| * [[https://github.com/analogdevicesinc/hdl/tree/master/projects/adrv9371x/kcu105| Xilinx KCU105]] | * [[https://github.com/analogdevicesinc/hdl/tree/master/projects/adrv9371x/kcu105| Xilinx KCU105]] |
| * [[adi>AD9691]]: 14-Bit, 1.25 GSPS JESD204B, Dual Analog-to-Digital Converter | * [[adi>AD9691]]: 14-Bit, 1.25 GSPS JESD204B, Dual Analog-to-Digital Converter |
| * [[adi>AD9694]]: 14-Bit, 500 MSPS JESD204B, Quad Analog-to-Digital Converter | * [[adi>AD9694]]: 14-Bit, 500 MSPS JESD204B, Quad Analog-to-Digital Converter |
| | * [[adi>AD9083]]: 16-Channel, 125 MHz Bandwidth, JESD204B Analog-to-Digital Converter |
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| ==== JESD204B Digital-to-Analog Converters ==== | ==== JESD204B Digital-to-Analog Converters ==== |
