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| Both sides previous revisionPrevious revision | Next revisionBoth sides next revision | ||
| resources:fpga:peripherals:jesd204:axi_jesd204_rx [25 Jan 2021 07:03] – [Interfaces and Signals] Laszlo Nagy | resources:fpga:peripherals:jesd204:axi_jesd204_rx [18 Feb 2021 15:59] – [Restrictions] Laszlo Nagy | ||
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| * No subclass 2 support. JESD204 subclass 2 has due to its implementation details restricted applicability and is seldom a viable option for a modern high-speed data converter system. To achieve deterministic latency it is recommend to use subclass 1 mode. | * No subclass 2 support. JESD204 subclass 2 has due to its implementation details restricted applicability and is seldom a viable option for a modern high-speed data converter system. To achieve deterministic latency it is recommend to use subclass 1 mode. | ||
| - | * Reduced number of octets-per-frame settings. The JESD204 standard allows for any value between 1 and 256 to be used for the number of octets-per-frame. The following | + | * Reduced number of octets-per-frame settings. The JESD204 standard allows for any value between 1 and 256 to be used for the number of octets-per-frame. |
| + | * The following | ||
| * Reduced number of frames-per-multi-frame settings. The following values are supported by the peripheral: 1-32, with the additional requirement that F*K is a multiple of 4. In addition F*K needs to be in the range of 4-256. | * Reduced number of frames-per-multi-frame settings. The following values are supported by the peripheral: 1-32, with the additional requirement that F*K is a multiple of 4. In addition F*K needs to be in the range of 4-256. | ||
| - | * No support for alignment character replacement when scrambling is disabled. | + | * No support for alignment character replacement when scrambling is disabled. |
| ===== Additional Information ===== | ===== Additional Information ===== | ||
resources/fpga/peripherals/jesd204/axi_jesd204_rx.txt · Last modified: 23 Jan 2024 10:40 by Adrian Costina