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| resources:fpga:docs:util_xcvr [28 Jan 2020 22:34] – Fix broken link Adrian Costina | resources:fpga:docs:util_xcvr [14 Jan 2021 05:38] – use xilinx> interwiki links Robin Getz |
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| The [[https://github.com/analogdevicesinc/hdl/tree/master/library/xilinx/util_adxcvr|util_adxcvr]] IP core instantiate a Gigabit Transceiver (GT) and set's up the required configuration. Basically is a simple wrapper file for a GT* Column, exposing just the necessary ports and attributes. | The [[https://github.com/analogdevicesinc/hdl/tree/master/library/xilinx/util_adxcvr|util_adxcvr]] IP core instantiate a Gigabit Transceiver (GT) and set's up the required configuration. Basically is a simple wrapper file for a GT* Column, exposing just the necessary ports and attributes. |
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| <note important>To understand the below wiki page is important to have a basic understanding about [[http://lmgtfy.com/?q=High+Speed+Serial+IO|High Speed Serial I/O]] interfaces and Gigabit Serial Transceivers. To find more information about these technologies please visit the [[https://www.xilinx.com/support/answers/37181.html|Xilinx's solution center]]. | <note important>To understand the below wiki page is important to have a basic understanding about [[http://lmgtfy.com/?q=High+Speed+Serial+IO|High Speed Serial I/O]] interfaces and Gigabit Serial Transceivers. To find more information about these technologies please visit the [[xilinx>support/answers/37181.html|Xilinx's solution center]]. |
| </note> | </note> |
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| Currently this IP supports three different GT type: | Currently this IP supports three different GT type: |
| * GTXE2 ([[https://www.xilinx.com/support/documentation/user_guides/ug476_7Series_Transceivers.pdf|7 Series devices]]) | * GTXE2 ([[xilinx>support/documentation/user_guides/ug476_7Series_Transceivers.pdf|7 Series devices]]) |
| * GTHE3 ([[https://www.xilinx.com/support/documentation/user_guides/ug576-ultrascale-gth-transceivers.pdf|Ultrascale and Ultrascale+]]) | * GTHE3 ([[xilinx>support/documentation/user_guides/ug576-ultrascale-gth-transceivers.pdf|Ultrascale and Ultrascale+]]) |
| * GTHE4 ([[https://www.xilinx.com/support/documentation/user_guides/ug576-ultrascale-gth-transceivers.pdf|Ultrascale and Ultrascale+]]) | * GTHE4 ([[xilinx>support/documentation/user_guides/ug576-ultrascale-gth-transceivers.pdf|Ultrascale and Ultrascale+]]) |
| * GTYE4 ([[https://www.xilinx.com/support/documentation/user_guides/ug578-ultrascale-gty-transceivers.pdf|Ultrascale and Ultrascale+]]) | * GTYE4 ([[xilinx>support/documentation/user_guides/ug578-ultrascale-gty-transceivers.pdf|Ultrascale and Ultrascale+]]) |
| ===== Features ===== | ===== Features ===== |
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| ===== References ===== | ===== References ===== |
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| * [[https://www.xilinx.com/products/technology/high-speed-serial.html|High Speed Serial]] | * [[xilinx>products/technology/high-speed-serial.html|High Speed Serial]] |
| * [[https://www.xilinx.com/support/documentation/user_guides/ug476_7Series_Transceivers.pdf|7 Series FPGAs GTX/GTH Transceivers]] | * [[xilinx>support/documentation/user_guides/ug476_7Series_Transceivers.pdf|7 Series FPGAs GTX/GTH Transceivers]] |
| * [[https://www.xilinx.com/support/documentation/user_guides/ug576-ultrascale-gth-transceivers.pdf|UltraScale Architecture GTH Transceivers]] | * [[xilinx>support/documentation/user_guides/ug576-ultrascale-gth-transceivers.pdf|UltraScale Architecture GTH Transceivers]] |
| * [[https://www.xilinx.com/support/documentation/user_guides/ug578-ultrascale-gty-transceivers.pdf|UltraScale Architecture GTY Transceivers]] | * [[xilinx>support/documentation/user_guides/ug578-ultrascale-gty-transceivers.pdf|UltraScale Architecture GTY Transceivers]] |
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| ===== More Information ===== | ===== More Information ===== |
