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resources:fpga:docs:util_extract [29 May 2017 14:39] – created Adrian Costinaresources:fpga:docs:util_extract [06 Jun 2018 13:00] – Reviewed Adrian Costina
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 ===== UTIL_EXTRACT ===== ===== UTIL_EXTRACT =====
  
-The UTIL_EXTRACT IP allows the extraction of the trigger signal and restoration of the data signal that were embedded in the data stream by the AXI_ADC_TRIGGER IP.+The UTIL_EXTRACT IP allows the extraction of the trigger signal and restoration of the data signal that was embedded in the data stream by the AXI_ADC_TRIGGER IP.
  
 ==== Configuration Parameters ==== ==== Configuration Parameters ====
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 ==== References ==== ==== References ====
-  * [[https://github.com/analogdevicesinc/hdl/tree/dev/library/util_extract | UTIL_EXTRACT IP source code]] \\+  * [[https://github.com/analogdevicesinc/hdl/tree/master/library/util_extract | UTIL_EXTRACT IP source code]] \\
   * [[https://wiki.analog.com/resources/fpga/docs/arch | ADI Reference designs architecture ]] \\   * [[https://wiki.analog.com/resources/fpga/docs/arch | ADI Reference designs architecture ]] \\
  
 {{navigation #axi_ip|AXI IP#hdl|Main page#tips|Tips}} {{navigation #axi_ip|AXI IP#hdl|Main page#tips|Tips}}
  
resources/fpga/docs/util_extract.txt · Last modified: 13 Oct 2021 08:33 by Iulia Moldovan