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resources:fpga:docs:git [14 Jan 2021 05:24] – use ez> / interwiki links Robin Getzresources:fpga:docs:git [08 Apr 2024 14:36] (current) – Add documentation migration warning iulia Moldovan
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 ====== HDL Git Repository ====== ====== HDL Git Repository ======
 +
 +<note important>We are in the process of migrating our documentation to GitHubIO. This page is outdated. Please check out our latest guide at https://analogdevicesinc.github.io/hdl/user_guide/git_repository.html</note>
  
 All the HDL sources can be found in the following git repository:  All the HDL sources can be found in the following git repository: 
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 If you want to pull down the sources as soon as possible, just do the following few steps: If you want to pull down the sources as soon as possible, just do the following few steps:
-  - Install Git from [[https://git-scm.com/|here]].+  - Install Git from [[https://git-scm.com/|here]]
   - Open up Git bash, change your current directory to a place where you want to keep the hdl source   - Open up Git bash, change your current directory to a place where you want to keep the hdl source
   - Clone the repository using [[https://help.github.com/articles/cloning-a-repository/|these]] instructions   - Clone the repository using [[https://help.github.com/articles/cloning-a-repository/|these]] instructions
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 <block 60%> <block 60%>
   .   .
 +  ├─ .github
 +  ├─ docs
   ├─ projects   ├─ projects
   ├─ library   ├─ library
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 </block> </block>
  
-The library folder contains all the IP cores and common modules. An IP, in general, contains Verilog files, which describe the hardware logic, constraint files, to ease timing closure, and Tcl scripts, which generate all the other files required for IP integration. (*_ip.tcl for Vivado and *_hw.tcl for Quartus) +The library folder contains all the IP cores and common modules. An IP, in general, contains Verilog files, which describe the hardware logic, constraint files, to ease timing closure, and Tcl scripts, which generate all the other files required for IP integration (*_ip.tcl for Vivado and *_hw.tcl for Quartus) .
  
-<note tip>In case of Vivado, all the IPs must be 'packed' before being used in a design. To find more information about how to build the libraries please visit the [[/resources/fpga/docs/build|Building & Generating programming files]] section.</note>  +<note tip>Regarding Vivado, all the IPs must be 'packed' before being used in a design. To find more information about how to build the libraries please visit the [[/resources/fpga/docs/build|Building & Generating programming files]] section.</note>  
  
 ===== Repository Releases and Branches ===== ===== Repository Releases and Branches =====
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 All our release branches have the following naming convention: **hdl_**[year_of_release]**_r**[1 or 2]. (e.g. [[https://github.com/analogdevicesinc/hdl/tree/hdl_2014_r2|hdl_2014_r2]]) All our release branches have the following naming convention: **hdl_**[year_of_release]**_r**[1 or 2]. (e.g. [[https://github.com/analogdevicesinc/hdl/tree/hdl_2014_r2|hdl_2014_r2]])
  
-ADI does two releases each year when all the projects get an update to support the latest tools and get additional new features. ** The master branch is always synced with the latest release.**    +ADI does two releases each year when all the projects get an update to support the latest tools and get additional new features. ** The master branch is always synchronized with the latest release.**    
-If you are in doubt, ask us on [[ez>community/fpga|Engineer Zone]]. +If you are in doubt, ask us on [[ez>community/fpga|FPGA Engineer Zone]]. 
  
 <note tip> <note tip>
resources/fpga/docs/git.txt · Last modified: 08 Apr 2024 14:36 by iulia Moldovan

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