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--- resources:eval:user-guides:ev-cog-adf7023-9z [25 Sep 2018 12:41] – [Interface] Pranit Jadhav
+++ resources:eval:user-guides:ev-cog-adf7023-9z [03 Oct 2018 08:38] (current) – [Schematics, PCB Layout, Bill of Material] Pranit Jadhav
@@ Line 1: / Line 1: @@
 ====== EV-COG-ADF7023-9Z User Guide ======
-EV-COG-ADF7023-9Z is an evaluation board to evaluate the ADF7023-J High Performance, Low Power, ISM Band FSK/GFSK/MSK/GMSK transceiver IC. The EV-COG-AD3029LZ evaluation board is a motherboard that controls ADF7023-J daughter boards. The daughter board plugs directly into the motherboard to provide a full ADF7023-J development kit for a wide range of applications depending upon the daughterboard selection. The various available daughter boards can be selected from the following Table 1.
+**EV-COG-ADF7023-9Z** is an evaluation board to evaluate the **[[adi>ADF7023-J]]** High Performance, Low Power, 902-958MHz ISM Band FSK/GFSK/MSK/GMSK transceiver IC. The **EV-COG-AD3029LZ** MCU Cog board controls **[[adi>ADF7023-J]]** daughter boards. The daughter board plugs directly into the MCU Cog to provide a full ADF7023-J development kit for a wide range of applications depending upon the daughterboard selection.
 ====== Features ======
@@ Line 10: / Line 9: @@
 ====== Interface ======
-EV-COG-ADF7023-9Z connects to motherboard through a hirose connector available on the daughter board. The motherboard will power up the daughter board, so no other external power supply is required. The daughter board has a testport P2 which can be used to probe logic analyzer to the GPIOs connecting MCU on the motherboard to ADF7023-J.
+EV-COG-ADF7023-9Z connects to MCU Cog through a hirose connector available on the daughter board. The MCU Cog will power up the daughter board, so no other external power supply is required. The daughter board has a testport P2 which can be used to probe logic analyzer to the GPIOs connecting MCU Cog to ADF7023-J.
+===== Primary Side =====
+{{ :resources:eval:user-guides:ev-cog-adf7023-9z:p.png?nolink&600 |}}
+===== Secondary Side =====
+{{ :resources:eval:user-guides:ev-cog-adf7023-9z:s.png?nolink&600 |}}
+===== Test Port =====
+{{ :resources:eval:user-guides:ev-cog-adf7023-9z:testport.png?nolink&300 |}}
+====== EV-COG-ADF7023-9Z Design and Integration Files ======
+<WRAP center round download 60%>
+  * {{ :resources:eval:user-guides:ev-cog-adf7023-9z:02-049613-01-a-1.pdf |Schematics}}
+  * {{ :resources:eval:user-guides:ev-cog-adf7023-9z:05-049613-01-a_ant.xlsx |Bill OF Material}}
+  * {{ :resources:eval:user-guides:ev-cog-adf7023-9z:09-049613-01a.zip |Fabrication Files}}
+  * {{ :resources:eval:user-guides:ev-cog-adf7023-9z:01-049613-01a.zip |Assembly Files}}
+</WRAP>
+**[[resources:eval:user-guides:rapidnet-ip|Back]]**

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