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CN0568 This circuit demonstrates the performance of ADI's quadband VCOs with the ADF41513 PLL device. The circuit design provides a complete frequency synthesizer solution including supply regulators, and control circuitry.
The key components used in this circuit are as follows:
The interface used to control the circuit is described in this section. The are 3 regions of the software interface panel as shown below.
1. Graphical control region : This contains all the buttons and numeric controls used to program the ADF41513.
2. Register region : If anything is changed in the graphical control region, a register is highlighted in green. This indicates to the user that the register must be written by pressing the corresponding Write register button. Note: There are some controls where a dedicated button is used to update the register in the graphical control region. In these cases the write register button is not used.
3. Log Window : This is used to show the most recent transactions to the user. A log can be saved of all activity in a session.
The device connection tab is displayed first after executing the software interface. From here, the user selects the device variant and the device configuration (single board or multi-board). After these are selected the user presses the Connect button to establish a connection.
This section contains the controls associated with the reference frequency.
By default, the board is configured to use the default 100MHz on-board reference crystal oscillator. If a different frequency external reference is used, this is changed in this control.
This can only be changed if an external reference frequency is used.
These can be used to change the PFD frequency accordingly on the ADF41513.
In the frequency control section, the VCO output frequency can be programmed. This is done by inputting the desired frequency in MHz. After inputting the frequency, press the 'Update Frequency' button to update.
The phase of an output signal can be incremented by specifying the value in the Phase Value field. The phase is calculated and can be updated by pressing the Increment Phase button. Phase resync is enabled by default in initialization sequence. To set the phase resync time, set the CLK1 and CLK2 multipliers accordingly. Note: the phase resync time must be greater than the worst case lock time.
A hop function can be performed between 2 frequencies in the Hop Function tab.
1. Download and install the CN0568 board software from the product page on analog.com. 2. Set up the evaluation board as shown in the setup image above with:
3. Open the software and select the relevant part/board variant.
4. Turn on the 5v power supply. Then turn on the 25v power supply.
5. Press ‘Write Initialization Sequence’ button to initialize the part.
6. In the spectrum analyzer instrument, set up a phase noise measurement. 7. Table 1. below lists the test frequencies for each part variant. On the evaluation software, in the ‘VCO Out’ box, input the first frequency for the variant used and press ‘Update Frequency’ button. 8. Wait until the instrument locks to the output frequency and displays the phase noise profile on screen. Note the phase noise at offsets of 100kHz, 1MHz and 10MHz. 9. Table 2. shows the limits of the maximum phase noise at a particular offset frequency for each variant. Boards with phase noise higher than these limits are deemed to be failures. 10. Repeat steps 7-9 for each test frequency in Table 1. for the board variant being tested.
EVAL-CN0xxx-ARDZ Design & Integration Files
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