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This version (12 Feb 2024 01:50) was approved by Joyce Velasco.

AD-PAARRAY3552R-SL Overview

About the Device

The AD-PAARRAY3552R-SL reference design provides control, protection, and proper biasing sequence of Gallium Nitride (GaN) and Gallium Arsenide (GaAs) power amplifier (PA) arrays, and is designed for massive multiple input - multiple output (MIMO) and macro base station RF front-end applications.

The system effectively manages the power-up and power-down progression of GaN power amplifiers while continuously monitoring crucial parameters such as drain voltages, drain current, gate voltages, and temperature.

The core of this solution is the AD3552R high-speed, dual-channel, 16-bit DAC, which supports ultrafast sub-µs voltage settling time of GaN gates.

It also features the LTC7000, a high-side NMOS static switch driver that adeptly handles key fault events such as overvoltage, overcurrent, and overtemperature.

The on-board MAX32666 ultralow power Arm Cortex-M4 microcontroller oversees the biasing sequence, sensor management, and user interface. The firmware can be effortlessly updated via SWD, UART-bootloader, facilitating rapid prototyping and development. Under normal operating conditions, the system can be powered from an external +48 V supply with approximately 3 A of current consumption.


AD-PAARRAY3552R-SL Board

Features

  • Designed to cover full Tx signal chains with integrated MCU and user-friendly GUI for faster and easier integration
  • Supports fault event protection: overvoltage (OV), overcurrent (OC), and overtemperature (OT)
  • Robust GaN/GaAs power amplifier biasing at any power-up/power-down sequence
  • Supports ultrafast sub-µs GaN gate voltage switching ~ (<1 µs)
  • Supports ultrafast fault event protection from detection up to gate pinch-off (<10 µs)
  • Wide range of gate bias voltages from -10 V to +10 V
  • Wide range of drain bias voltage from +38 V to +55 V (adjustable)
  • Configurable power-up and power-down sequence
  • Can accommodate from two to four GaN/GaAs Power Amplifiers
  • Real-time monitoring of voltages, currents, and temperature.


Applications

  • 5G massive MIMOs
  • Macro base stations



System Architecture


Figure 1. AD-PAARRAY3552R-SL System Block Diagram



Specifications

Features
Drain Voltage Range +38 V to +55 V (can be adjusted from +4.5 V to +60 V)
Gate Voltage Range -10 V to +10 V
Drain Current 40 A
Gate Current ±1.6 mA
Gate Voltage Ripple 2 mV (p-p)
Fault Event
Overvoltage +55 V (can be adjusted from +4.5 V to +55 V)
Overcurrent 3.5 A (can be adjusted from 1.3 A to 5 A)
Overtemperature +75°C
Computing Resources
CPU MAX32666 Low-Power Arm Cortex-M4 with FPU-Based Microcontroller with Bluetooth 5 for Wearables
Memory 1 MB SRAM
Storage 64 MB QSPI Flash
User Interface & Control
Communication UART
Debugging SWD
Power Supply
External +48 V DC with higher current capabilities
Operating Conditions
Operating temperature -45°C to +75°C
Package Contents
1 x AD-PAARRAY3552R-SL board, 4 x Standoffs, 4 x Screws

The solution also comes with a pre-programmed firmware allowing the system to interface with a PC application for a system configuration, control, and data acquisition through serial interface.

In order to update the firmware on the on-board MCU, the user needs to purchase the MAX32625 PICO Evaluation Kit separately.


User Guides

Software

Visit this page to learn how to install the firmware and use the application GUI:


Hardware Setup and Evaluation

Get complete access to hardware configuration, design files, and procedure on how to use the AD-PAARRAY3552R-SL:


Further Help

For questions and more information about this product, connect with us through the Analog Devices Engineer Zone.

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resources/eval/user-guides/ad-paarray3552r-sl.txt · Last modified: 12 Feb 2024 01:50 by Joyce Velasco