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resources:eval:dpg:ad9152-fmc-ebz [02 Aug 2022 11:44] – [AD9152-FMC-EBZ Evaluation Board Quick Start Guide] Shine Cabatan | resources:eval:dpg:ad9152-fmc-ebz [11 Oct 2022 14:05] (current) – [Software Needed] Shine Cabatan | ||
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- | ====== EVALUATING THE AD9152 DIGITAL-TO-ANALOG CONVERTER ====== | + | ====== EVALUATING THE AD9152 DIGITAL-TO-ANALOG CONVERTER ====== |
- | ===== Getting Started with the AD9152-FMC-EBZ Evaluation Board and Software ===== | + | |
- | ==== What's in the Box ==== | + | |
- | * [[adi> | + | |
- | * Evaluation Board CD | + | |
- | * Mini-USB Cable | + | |
- | ==== Recommended Equipment List ==== | + | |
- | * Sinusoidal Clock Sources | + | |
- | * Spectrum Analyzer | + | |
- | * Oscilloscope | + | |
- | * Data Pattern Generator ADS7 | + | |
- | ===== Introduction ====== | + | |
- | The AD9152-FMC-EBZ connects to an ADS7 data pattern generator system. The AD9152 is a dual JESD204B signal processing RF Digital to Analog Converter. The ADS7 automatically formats the data and sends it to the AD9152-FMC-EBZ via its JESD204B lanes. The AD9152-FMC-EBZ is an FMC mezzanine card. +12V, +3.3V, and VADJ power supply rails are provided by the ADS7 system via the FMC connector P1. A clock distribution chip AD9516 is included on this EVB as a clock fan-out and frequency divider for the DACCLK, JESD204B SYSREF signals, and a GBTCLK clock used by the ADS7. There is also an FMC standard I2C bus that is used by the ADS7 to identify the AD9152-FMC-EBZ. This I2C interface is implemented in software in the AD9152-FMC-EBZ PIC processor (XU1). All ADS7 to/from AD9152-FMC-EBZ interface signals are connected via the FMC connector P1. | + | |
- | ===== AD9152 Evaluation Software ===== | + | |
- | The ACE application software, the preferred evaluation method for the AD9152, is included in the Evaluation Board software or can be downloaded from the ACE website at http:// | + | |
- | ===== Hardware Setup ===== | + | |
- | A low phase noise high frequency clock source should be connected to the SMA connector J1, This is the DACCLK input. The spectrum analyzer should be connected to the SMA connector, | + | |
+ | ===== Preface ====== | ||
- | <WRAP center> | + | This user guide describes both the hardware and software setup needed to acquire data capture from [[adi>EVAL-AD9152|AD9152-FMC-EBZ]] evaluation board to characterize [[adi> |
- | | {{: | + | The [[adi> |
- | | Figure 1. Block diagram of the AD9152-FMC-EBZ | + | |
- | </ | + | ===== Typical Setup ===== |
+ | <WRAP centeralign> | ||
- | ===== Getting Started ===== | + | <WRAP centeralign> |
- | The PC software is included in the CD shipped with the EVB. The installation will include the DPG Downloader software and ACE software as well as all the necessary AD9152 files including schematic, board layout, datasheet, and other files. | + | |
- | ==== Initial Set-Up ==== | + | |
- | 1. Install ACE software or SPIPro software and support files on your PC. Follow the instructions in the installation wizard and use the default (recommended) installation settings. | + | |
- | 2. Plug the AD9152-FMC-EBZ | + | |
- | 3. Connect the ADS7 unit to your PC via USB and turn on the ADS7. \\ \\ | + | |
- | ==== Single-Tone Test ==== | + | |
- | These settings configure the AD9152 to output a sine wave using the ADS7 and allow the | + | |
- | user to view the single-tone performance at the DAC output, under the condition: Fdata = 375MHz, 4X interpolation, | + | |
- | Following settings configure the AD9152 to output a 100Mhz (-10dbFS) sine wave using the ADS7 on both 2 of AD9152 DACs. | + | <note tip>Tip: Click on any picture in this guide to open an enlarged version.</ |
- | - Configure the hardware according to the hardware set-up instructions given in the Hardware Setup section above. Set the frequency of the DAC clock signal generator to 1500MHz, and the output level to 3dBm. The spectrum analyzer can be configured as shown in Figure 6 with a resolution bandwidth of 30kHz. Choose an Input Attenuation of 10dB. | + | ===== Helpful Files/Links ===== |
- | === Using ACE === | + | * User Guides for non-FMC card users: |
- | 1. Open DPG Downloader Lite. | + | * [[: |
+ | * [[: | ||
+ | * [[: | ||
+ | * Datasheet: [[adi> | ||
+ | * IBIS Model: [[ibis> | ||
+ | * AMI Model: [[https:// | ||
+ | * Schematic: {{: | ||
+ | * Bill of Materials: {{: | ||
+ | * PCB Gerber Files: {{: | ||
+ | * PCB BRD File: {{: | ||
+ | * PCB Layout PDF: {{: | ||
- | <WRAP center> | + | ===== Software Needed ===== |
- | | {{ : | + | * [[: |
- | | Figure 3. Initial | + | * [[: |
- | </WRAP> | + | * [[adi>plugins/ |
- | 2. Open ACE from the start window. It can be found by following the file path to the program or by searching in the windows search bar for “ACE.” The {{:resources:eval:user-guides: | + | <note important> |
- | 3. If the board is connected properly, ACE will detect it and display it on the Start page under " | + | * Do not install ACE on a computer with DAC Software Suite. |
- | <WRAP center> | + | * **Known Issue: |
+ | </note> | ||
- | | {{ : | + | ===== Hardware Needed ===== |
- | | Figure 4. The detected AD9152 in ACE. | | + | |
- | </ | + | |
- | 4. Ensure that the {{: | + | * [[adi> |
- | <WRAP center> | + | * USB-A to USB-Mini Cable |
+ | * [[: | ||
+ | * 12V 60W AC/DC Power Supply | ||
+ | * Power Cord | ||
+ | * USB-A to USB-B Cable | ||
+ | * PC with ACE and DPG Lite Software Applications | ||
+ | * Low Phase Noise High-Frequency Continuous Wave Generator | ||
+ | * Signal/ | ||
+ | * (2) SMA Cables | ||
- | | {{ : | + | ===== Quick Start Guide ===== |
- | | Figure 5. The AD9152 system. | + | |
- | </ | + | |
- | 5. To the left of the board diagram, click " | + | - Attach AD9152-FMC-EBZ onto the FMC connector |
- | < | + | - Set the frequency of the continuous waveform generator output to **1.5 GHz** and the output level to **+3 dBm**. Enable the output. <WRAP centeralign> |
+ | - Start DPG Lite or DPG Downloader. A panel named after the detected controller | ||
+ | - Open ACE. The board will automatically | ||
+ | - In ACE, apply the configuration wizard settings enumerated below and shown in Figure 4. JESD204B PLL should lock and the indicator should turn green. | ||
+ | * **FDAC:** 1.5 GHz | ||
+ | * **Interpolation: | ||
+ | * **JESD Mode:** 4 | ||
+ | * **Subclass1: | ||
+ | * **DigGain: | ||
+ | * **PLL_Enable: | ||
+ | * **Input Data Format:** 2's complement | ||
+ | - In DPG Lite or DPG Downloader, configure single tone waveform generation. From the **Add Generator Waveforms** pulldown menu, select **Single Tone**. Apply the following settings: | ||
+ | * **Data Rate:** 350 MHz | ||
+ | * **Desired Frequency: | ||
+ | * **DAC Resolution: | ||
+ | * **Amplitude: | ||
+ | * **Unsigned Data:** unchecked | ||
+ | * **Generate Complex Data (I & Q):** checked | ||
+ | - In the ADS7-V2 or ADS8-V1 panel in the DPG window, configure **Data Playback** by selecting tones for the DAC outputs from each dropdown menu. Set **JESD Mode** to Mode 4, **Links** to Single and **Subclass** to 1.<WRAP centeralign> | ||
+ | - Press the download arrow ({{: | ||
- | | {{ : | ||
- | | Figure 6. The board block diagram of the AD9152. | ||
- | </ | ||
- | 6. Alter the inputs to match the figure below. Click " | ||
- | <WRAP center> | ||
- | |||
- | | {{ : | ||
- | | Figure 7. Inputs for the Initial Configuration of the AD9152. | ||
- | </ | ||
- | |||
- | 7. Double click on the dark blue AD9152 on the board diagram. Ensure that the settings of the AD9152 match with the chip diagram in the figure below and click "Apply Changes." | ||
- | <WRAP center> | ||
- | |||
- | | {{ : | ||
- | | Figure 8. The chip block diagram of the AD9152. | ||
- | </ | ||
- | |||
- | 8. On the DPGDownloader panel, select Single Tone under the Add Generated Waveforms Tab. Set Data Rate: 375Mhz, Desired Frequency: 100Mhz, Amplitude: -10dbFS, Uncheck Unsigned Data, Check Generate Complex Data (I and Q). \\ \\ | ||
- | |||
- | 9. Click Download ({{: | ||
- | |||
- | <WRAP center> | ||
- | |||
- | | {{ : | ||
- | | Figure 9. AD9152-FMC-EBZ Fully Configured DPG Downloader Display | ||
- | </ | ||
- | |||
- | 10.Here is what you will see at the output of DAC0 on the Spectrum Analyzer. | ||
- | |||
- | <WRAP center> | ||
- | |||
- | | {{ : | ||
- | | Figure 10. DAC Output Spectrum Analyzer Display | ||
- | </ | ||
- | |||
- | === Using SPIPro === | ||
- | 1. On your lab computer, open the SPIPro application (Start > All Programs > Analog Devices > AD9152 > SPIPro). You will see the GUI shown in Figure 12 come up. Run DPG Downloader Lite. It will say AD9152 as shown in Figure 11. \\ \\ | ||
- | |||
- | <WRAP center> | ||
- | |||
- | | {{ : | ||
- | | Figure 11. Initial DPG Downloader Panel | | ||
- | </ | ||
- | |||
- | 2. Open SPIPro. It will show AD9152-FMC-EBZ in the upper left hand corner. \\ \\ | ||
- | |||
- | 3. Select single link, JESD mode 4, Interpolation 4. Press ‘Configure DAC and Clock’ button. JESD204B PLL lock will turn green. \\ \\ | ||
- | <WRAP center> | ||
- | |||
- | | {{ : | ||
- | | Figure 12. Fully Configured SPIPro Display | ||
- | </ | ||
- | |||
- | 4. Select Single Tone under the Add Generated Waveforms Tab. Set Data Rate: 375Mhz, Desired Frequency: 100Mhz, Amplitude: -10dbFS, Uncheck Unsigned Data, Check Generate Complex Data (I and Q). \\ \\ | ||
- | |||
- | 5. Click Download ({{: | ||
- | |||
- | <WRAP center> | ||
- | | {{ : | ||
- | | Figure 13. AD9152-FMC-EBZ Fully Configured DPG Downloader Display | ||
- | </ | ||
- | |||
- | 6. Here is what you will see at the output of DAC0 on the Spectrum Analyzer. | ||
- | |||
- | <WRAP center> | ||
- | | {{ : | ||
- | |||
- | | Figure 14. DAC Output Spectrum Analyzer Display | ||
- | </ | ||
- | |||
- | ===== ACE Software Features ===== | ||
- | The ACE software is organized to allow the user to evaluate and control the AD9122A evaluation board. The “Initial Configuration” wizard, which is only available for certain boards, controls the DAC and PLL setups. Block diagram views of the board and chip contain elements that can be used to vary parameters like ref current and data format. These parameters can be changed using check boxes, drop down menus, and input boxes. Some parameters do not have settings shown in the diagram. Double click on the parameter to view the available settings, seen with the NCO settings below. | ||
- | |||
- | {{ : | ||
- | <WRAP clear> | ||
- | </ | ||
- | <WRAP centeralign> | ||
- | |||
- | In addition, some parameters can be enabled or disabled. This feature is evident by the color of the block parameter. For example, if the block parameter is dark blue, the parameter is enabled. If it is light grey, it is disabled. To enable or disable a parameter, click on it. | ||
- | |||
- | <WRAP column 40%> | ||
- | {{ : | ||
- | </ | ||
- | <WRAP column 55%> | ||
- | {{ : | ||
- | </ | ||
- | <WRAP clear> | ||
- | </ | ||
- | <WRAP column 40%> | ||
- | <WRAP centeralign> | ||
- | </ | ||
- | <WRAP column 55%> | ||
- | <WRAP centeralign> | ||
- | </ | ||
- | <WRAP clear> | ||
- | </ | ||
- | |||
- | More direct changes to registers and bit fields can be made in the memory map, which is linked from the chip block diagram through the “Proceed to Memory Map” button. In this view, names, addresses, and data can be manually altered by the user. | ||
- | |||
- | {{ : | ||
- | <WRAP clear> | ||
- | </ | ||
- | <WRAP centeralign> | ||
- | |||
- | ACE also contains the Macro Tool, which can be used to record register reads and writes. This is executed in the memory map view or with the initialization wizard. To use, check the “Record Sub-Commands” checkbox and press the record button. Changes in the memory map, which are bolded until they are applied to the part, are recorded as UI commands by the macro tool once the changes are made. Changed register write commands for the controls are also recorded. Hit “Apply Changes” to execute the commands and make changes in the memory map. To stop recording, click the “Stop Recording” button. A macro tool page with the command steps will be created. The macro can be saved using the “Save Macro” button so that it may be loaded for future use. | ||
- | |||
- | {{ : | ||
- | <WRAP clear> | ||
- | </ | ||
- | <WRAP centeralign> | ||
- | |||
- | The raw macro file will be saved using ACE syntax, which is not easily readable. To remedy this, the ACE software download includes the Macro to Hex Conversion Tool. The user can choose to include or exclude register write, reads, and/or comments in the conversion. The file pathways for the source and save paths should be the same, except that one should be an .acemacro file and the other should be a .txt file. The “Convert” button converts and opens the converted text file, which is easier to read. The conversion tool can also convert back to an .acemacro file if desired. | ||
- | |||
- | <WRAP column 40%> | ||
- | {{ : | ||
- | </ | ||
- | <WRAP column 55%> | ||
- | {{ : | ||
- | </ | ||
- | <WRAP clear> | ||
- | </ | ||
- | <WRAP column 40%> | ||
- | <WRAP centeralign> | ||
- | </ | ||
- | <WRAP column 55%> | ||
- | <WRAP centeralign> | ||
- | </ | ||
- | <WRAP clear> | ||
- | </ | ||
- | For more information about ACE and its features, visit https:// | ||