Wiki

This version (24 Sep 2018 17:19) was approved by MicheleV.The Previously approved version (14 Jul 2017 15:59) is available.Diff

AD9152-FMC-EBZ Evaluation Board Quick Start Guide

Getting Started with the AD9152-FMC-EBZ Evaluation Board and Software

What's in the Box

  • AD9152-FMC-EBZ Evaluation Board for ADS7
  • Evaluation Board CD
  • Mini-USB Cable
  • Sinusoidal Clock Sources
  • Spectrum Analyzer
  • Oscilloscope
  • Data Pattern Generator ADS7

Introduction

The AD9152-FMC-EBZ connects to an ADS7 data pattern generator system. The AD9152 is a dual JESD204B signal processing RF Digital to Analog Converter. The ADS7 automatically formats the data and sends it to the AD9152-FMC-EBZ via its JESD204B lanes. The AD9152-FMC-EBZ is an FMC mezzanine card. +12V, +3.3V, and VADJ power supply rails are provided by the ADS7 system via the FMC connector P1. A clock distribution chip AD9516 is included on this EVB as a clock fan-out and frequency divider for the DACCLK, JESD204B SYSREF signals, and a GBTCLK clock used by the ADS7. There is also an FMC standard I2C bus that is used by the ADS7 to identify the AD9152-FMC-EBZ. This I2C interface is implemented in software in the AD9152-FMC-EBZ PIC processor (XU1). All ADS7 to/from AD9152-FMC-EBZ interface signals are connected via the FMC connector P1.

AD9152 Evaluation Software

The ACE application software, the preferred evaluation method for the AD9152, is included in the Evaluation Board software or can be downloaded from the ACE website at http://www.analog.com/en/design-center/evaluation-hardware-and-software/ace-software.html. In addition, the AD9152 Evaluation Board software runs on the easy-to-use legacy SPIPro graphical user interface (GUI), but ACE is preferred. It is included on the Evaluation Board CD. Registers on the AD9152 and AD9516 products are programmed via a USB cable connecting the user’s PC to the AD9152-FMC-EBZ XP2 connector. Software in the AD9152-FMC-EBZ PIC processor (XU1) provides the interface between the USB bus and the SPI busses of the AD9152 and AD9516. Software for DPGDownloader can be downloaded from the DPG website at http://www.analog.com/dpg.

Hardware Setup

A low phase noise high frequency clock source should be connected to the SMA connector J1, This is the DACCLK input. The spectrum analyzer should be connected to the SMA connector,J4 or J17. The evaluation board connects to the ADS7 through the connectors P3. The PC should be connected to the EVB using the mini-USB connector XP2 after installation of the Evaluation Board software. Figure 1 shows the block diagram of the set-up.

Figure 1. Block diagram of the AD9152-FMC-EBZ lab bench set-up Figure 2. Top view of AD9152-FMC-EBZ

Getting Started

The PC software is included in the CD shipped with the EVB. The installation will include the DPG Downloader software and ACE software as well as all the necessary AD9152 files including schematic, board layout, datasheet, and other files.

Initial Set-Up

1. Install the DPG Downloader and ACE software or SPIPro software and support files on your PC. Follow the instructions in the installation wizard and use the default (recommended) installation settings.

2. Plug the AD9152-FMC-EBZ into port FMC_1 of the ADS7 System. Use a USB cable to connect the EVB to your PC and connect the lab equipment to the EVB as shown in Figure 1.

3. Connect the ADS7 unit to your PC via USB and turn on the ADS7.

Single-Tone Test

These settings configure the AD9152 to output a sine wave using the ADS7 and allow the user to view the single-tone performance at the DAC output, under the condition: Fdata = 375MHz, 4X interpolation, Fout = 100MHz.

Following settings configure the AD9152 to output a 100Mhz (-10dbFS) sine wave using the ADS7 on both 2 of AD9152 DACs.

- Configure the hardware according to the hardware set-up instructions given in the Hardware Setup section above. Set the frequency of the DAC clock signal generator to 1500MHz, and the output level to 3dBm. The spectrum analyzer can be configured as shown in Figure 6 with a resolution bandwidth of 30kHz. Choose an Input Attenuation of 10dB.

Using ACE

1. Open DPG Downloader. It will say AD9152 as shown in Figure 3.

Figure 3. Initial DPG Downloader Panel

2. Open ACE from the start window. It can be found by following the file path to the program or by searching in the windows search bar for “ACE.” The icon indicates the ACE software.

3. If the board is connected properly, ACE will detect it and display it on the Start page under “Attached Hardware.” Double click this board.

Figure 4. The detected AD9152 in ACE.

4. Ensure that the button is green in the subsystem image under the “System” tab. If not, click it, select the AD9152, and click “Acquire.” Double click on the subsystem image.

Figure 5. The AD9152 system.

5. To the left of the board diagram, click “Modify” under “Initial Configuration Summary” to edit the DAC and PLL setup of the board. In some cases, the “Initial Configuration” page will already be shown.

Figure 6. The board block diagram of the AD9152.

6. Alter the inputs to match the figure below. Click “Apply.”

Figure 7. Inputs for the Initial Configuration of the AD9152.

7. Double click on the dark blue AD9152 on the board diagram. Ensure that the settings of the AD9152 match with the chip diagram in the figure below and click “Apply Changes.” The “Poll Devices” button and JESD PLL Locked should both be enabled. If neither are enabled, click “Read All” or reset the board, reset the chip, and reapply the settings for the board and chip. For more information about ACE, see the “ACE Software Features” section.

Figure 8. The chip block diagram of the AD9152.

8. On the DPGDownloader panel, select Single Tone under the Add Generated Waveforms Tab. Set Data Rate: 375Mhz, Desired Frequency: 100Mhz, Amplitude: -10dbFS, Uncheck Unsigned Data, Check Generate Complex Data (I and Q).

9. Click Download () and Play () in the DPG Downloader screen. The spectrum in Figure 6 will appear on all 2 DAC outputs (J17, J4, ), Serial Line Rate will be 3.75Gsps.

Figure 9. AD9152-FMC-EBZ Fully Configured DPG Downloader Display

10.Here is what you will see at the output of DAC0 on the Spectrum Analyzer.

Figure 10. DAC Output Spectrum Analyzer Display

Using SPIPro

1. On your lab computer, open the SPIPro application (Start > All Programs > Analog Devices > AD9152 > SPIPro). You will see the GUI shown in Figure 12 come up. Run DPG Downloader. It will say AD9152 as shown in Figure 11.

Figure 11. Initial DPG Downloader Panel

2. Open SPIPro. It will show AD9152-FMC-EBZ in the upper left hand corner.

3. Select single link, JESD mode 4, Interpolation 4. Press ‘Configure DAC and Clock’ button. JESD204B PLL lock will turn green.

Figure 12. Fully Configured SPIPro Display

4. Select Single Tone under the Add Generated Waveforms Tab. Set Data Rate: 375Mhz, Desired Frequency: 100Mhz, Amplitude: -10dbFS, Uncheck Unsigned Data, Check Generate Complex Data (I and Q).

5. Click Download () and Play () in the DPG Downloader screen. The spectrum in figure 6 will appear on all 2 DAC outputs (J17, J4, ), Serial Line Rate will be 3.75Gsps.

Figure 13. AD9152-FMC-EBZ Fully Configured DPG Downloader Display

6. Here is what you will see at the output of DAC0 on the Spectrum Analyzer.

Figure 14. DAC Output Spectrum Analyzer Display

ACE Software Features

The ACE software is organized to allow the user to evaluate and control the AD9122A evaluation board. The “Initial Configuration” wizard, which is only available for certain boards, controls the DAC and PLL setups. Block diagram views of the board and chip contain elements that can be used to vary parameters like ref current and data format. These parameters can be changed using check boxes, drop down menus, and input boxes. Some parameters do not have settings shown in the diagram. Double click on the parameter to view the available settings, seen with the NCO settings below.

NCO settings for the AD9122

In addition, some parameters can be enabled or disabled. This feature is evident by the color of the block parameter. For example, if the block parameter is dark blue, the parameter is enabled. If it is light grey, it is disabled. To enable or disable a parameter, click on it.

Enabled parameter

Disabled parameter

More direct changes to registers and bit fields can be made in the memory map, which is linked from the chip block diagram through the “Proceed to Memory Map” button. In this view, names, addresses, and data can be manually altered by the user.

Bench Set-Up

ACE also contains the Macro Tool, which can be used to record register reads and writes. This is executed in the memory map view or with the initialization wizard. To use, check the “Record Sub-Commands” checkbox and press the record button. Changes in the memory map, which are bolded until they are applied to the part, are recorded as UI commands by the macro tool once the changes are made. Changed register write commands for the controls are also recorded. Hit “Apply Changes” to execute the commands and make changes in the memory map. To stop recording, click the “Stop Recording” button. A macro tool page with the command steps will be created. The macro can be saved using the “Save Macro” button so that it may be loaded for future use.

Macro tool in ACE. The Stop Recording, Record, and Save Macro commands are located at the top of the macro tool.

The raw macro file will be saved using ACE syntax, which is not easily readable. To remedy this, the ACE software download includes the Macro to Hex Conversion Tool. The user can choose to include or exclude register write, reads, and/or comments in the conversion. The file pathways for the source and save paths should be the same, except that one should be an .acemacro file and the other should be a .txt file. The “Convert” button converts and opens the converted text file, which is easier to read. The conversion tool can also convert back to an .acemacro file if desired.

Conversion set-up for macro to hex

Converted text file

For more information about ACE and its features, visit https://wiki.analog.com/resources/tools-software/ace.

resources/eval/dpg/ad9152-fmc-ebz.txt · Last modified: 27 Dec 2017 12:59 by JayChiang