This shows you the differences between two versions of the page.
Both sides previous revisionPrevious revisionNext revision | Previous revision | ||
resources:eval:dpg:ad9136-fmc-ebz [02 Aug 2022 07:42] – [Quick Start Guide] Shine Cabatan | resources:eval:dpg:ad9136-fmc-ebz [11 Oct 2022 14:05] (current) – [Software Needed] Shine Cabatan | ||
---|---|---|---|
Line 9: | Line 9: | ||
===== Typical Setup ===== | ===== Typical Setup ===== | ||
- | <WRAP centeralign> | + | <WRAP centeralign> |
- | <WRAP centeralign> | + | |
+ | <WRAP centeralign> | ||
+ | |||
+ | <WRAP centeralign> | ||
+ | |||
+ | <WRAP centeralign> | ||
<note tip>Tip: Click on any picture in this guide to open an enlarged version.</ | <note tip>Tip: Click on any picture in this guide to open an enlarged version.</ | ||
+ | |||
===== Helpful Files/Links ===== | ===== Helpful Files/Links ===== | ||
- | * [[: | + | * [[: |
+ | * [[: | ||
* Datasheet: [[adi> | * Datasheet: [[adi> | ||
* IBIS Model: [[ibis> | * IBIS Model: [[ibis> | ||
+ | * AMI Model: [[https:// | ||
* Simulink ADIsimDAC Model: [[http:// | * Simulink ADIsimDAC Model: [[http:// | ||
* Schematic: {{: | * Schematic: {{: | ||
Line 30: | Line 38: | ||
* [[: | * [[: | ||
* ACE Plugin for Specific Device: [[adi> | * ACE Plugin for Specific Device: [[adi> | ||
- | <note important> | + | |
+ | <note important> | ||
+ | * Do not install ACE on a computer with DAC Software Suite. | ||
+ | * **Known Issue:** ACE may fail to detect HS-DAC boards, details [[resources: | ||
+ | </ | ||
===== Hardware Needed ===== | ===== Hardware Needed ===== | ||
Line 36: | Line 48: | ||
* [[adi> | * [[adi> | ||
* USB-A to USB-Mini Cable | * USB-A to USB-Mini Cable | ||
- | * [[: | + | * [[: |
* 12V 60W AC/DC Power Supply | * 12V 60W AC/DC Power Supply | ||
* Power Cord | * Power Cord | ||
Line 43: | Line 55: | ||
* Low Phase Noise High-Frequency Continuous Wave Generator | * Low Phase Noise High-Frequency Continuous Wave Generator | ||
* Signal/ | * Signal/ | ||
- | * (2) SMA Cables | + | * (3) SMA Cables |
===== Quick Start Guide ===== | ===== Quick Start Guide ===== | ||
- | - Attach | + | - Attach AD9135-FMC-EBZ/ |
- | - Set the frequency of the continuous waveform generator output to **2.0 GHz** and the output level to **+3 dBm**. Enable the output. | + | - Set the frequency of the continuous waveform generator output to **2.0 GHz** and the output level to **+3 dBm**. Enable the output.<WRAP centeralign> |
- | - Start DPG Lite or DPG Downloader. A panel named after the detected controller board should appear at the bottom of the DPG window. The device on the evaluation board and the data interface should also be automatically detected by the software and shown at **Evaluation Board** and **Port Configuration**, | + | - Start DPG Lite or DPG Downloader. A panel named after the detected controller board should appear at the bottom of the DPG window. The device on the evaluation board and the data interface should also be automatically detected by the software and shown at **Evaluation Board** and **Port Configuration**, |
- | - Open ACE. The board will automatically be recognized by the software. Otherwise, install the plugin for AD9135/ | + | - Open ACE. The board will automatically be recognized by the software. Otherwise, install the plugin for AD9135/ |
- | - In ACE, apply the configuration wizard settings shown in Figure | + | - In ACE, apply the configuration wizard settings |
- | - In DPG Lite or DPG Downloader, configure two single tone generated | + | * **Links:** Dual Link |
+ | * **JESD Mode:** 8 | ||
+ | * **Subclass1: | ||
+ | * **Interpolation: | ||
+ | * **DAC PLL:** False | ||
+ | * **FDAC:** 2 GHz<WRAP centeralign> | ||
+ | - In DPG Lite or DPG Downloader, configure | ||
* **Data Rate** = 2 GHz, **Amplitude** = -1dBFS, **Unsigned Data** is unchecked for both panels. | * **Data Rate** = 2 GHz, **Amplitude** = -1dBFS, **Unsigned Data** is unchecked for both panels. | ||
- | * **Desired Frequency= 112 MHz** in one panel while **Desired Frequency = 221 MHz** in the other. | + | * **Desired Frequency = 112 MHz** in one panel while **Desired Frequency = 221 MHz** in the other. |
* If using AD9135, set **DAC Resolution** to **11 bits**. Otherwise, leave as is (16 bits). | * If using AD9135, set **DAC Resolution** to **11 bits**. Otherwise, leave as is (16 bits). | ||
- | - In the ADS7-V2 or ADS8-V1 panel in the DPG window, configure **Data Playback** by selecting tone2 for DAC0 and tone1 for DAC1. Set **JESD Mode** to Mode 8, **Links** to Dual, and **Subclass** to 1. | + | - In the ADS7-V2 or ADS8-V1 panel in the DPG window, configure **Data Playback** by selecting tone2 for DAC0 and tone1 for DAC1. Set **JESD Mode** to Mode 8, **Links** to Dual, and **Subclass** to 1. < |
- | - Press the download arrow then the play button. **Serial Line Rate** should appear as 10 Gbps and **Sync Status** should have two check marks. Refer to FFT plot of the DAC0 output in Figure <> and the oscilloscope capture of DAC1 output in Figure <>. | + | - Press the download arrow ({{: |
- | + | ||
- | + | ||
- | + | ||
- | ===== Getting Started ===== | + | |
- | The PC software comes on the included Evaluation Board CD, but may also be downloaded from the DPG Web site at http:// | + | |
- | + | ||
- | Schematic and board layout files can also be found [[/ | + | |
- | ==== Initial Set-Up ==== | + | |
- | 1. Install the DPG Downloader and ACE or the AD9136/ | + | |
- | 2. Use a USB cable to connect the EVB to your PC and connect the lab equipment to the EVB. \\ | + | |
- | 3. Connect the DGP3 unit to your PC and turn on the unit. \\ | + | |
- | + | ||
- | + | ||
- | + | ||
- | ==== Single-Tone Test ==== | + | |
- | These settings configure the AD9136/ | + | |
- | === Configure DPG Vector Software | + | |
- | 1. To begin, turn on the external +5V supply. \\ \\ | + | |
- | 2. Open DPG Downloader if you have not done so. (Start > All Programs > Analog Devices > DPG > DPGDownloader). Ensure that the program detects the AD9136/ | + | |
- | 3. Click on “Add Generated Waveform”, | + | |
- | 4. Select the WIFR vector (I) in the “DAC0” drop down menu and the WIFR vector (Q) in the “DAC1”. At this point, the DPG Downloader panel should look like Figure 3.\\ \\ | + | |
- | + | ||
- | < | + | |
- | | {{ {{ : | + | |
- | | Figure 3. DPG Downloader Panel | | + | |
- | </ | + | |
- | + | ||
- | === Configuring SPI using ACE === | + | |
- | + | ||
- | 1. Configure the hardware according to the hardware set-up instructions given in the Hardware Setup section above. Set the frequency of the DAC clock signal generator to 1.6GHz, and the output level to 3dBm. The spectrum analyzer can be configured with Start Frequency = 1 MHz, Stop Frequency | + | |
- | + | ||
- | 2. Open ACE (Start > All Programs > Analog Devices > ACE > ACE). The {{: | + | |
- | <WRAP center> | + | |
- | + | ||
- | | {{ {{ : | + | |
- | + | ||
- | | Figure 4. Detected AD9135 in ACE | | + | |
- | </ | + | |
- | + | ||
- | Ensure that the {{: | + | |
- | <WRAP center> | + | |
- | + | ||
- | | {{ {{ : | + | |
- | + | ||
- | | Figure 5. AD9135 system | + | |
- | </ | + | |
- | + | ||
- | Next to the board block diagram, click " | + | |
- | <WRAP center> | + | |
- | + | ||
- | | {{ {{ : | + | |
- | + | ||
- | | Figure 6. AD9135 board block diagram. The JESD PLL should not be locked yet | | + | |
- | </ | + | |
- | + | ||
- | Select "Dual Link" from the pull-down menu next to Links, and set the JESD Mode to 8. Check the Subclass box and set interpolation to 1. The FDAC frequency should be set to 1.6 GHz. The settings should match Figure 6. Select " | + | |
- | <WRAP center> | + | |
- | + | ||
- | | {{ {{ : | + | |
- | + | ||
- | | Figure 7. Initial configuration settings for the AD9135 | + | |
- | </ | + | |
- | + | ||
- | Double click on the dark blue AD9135 chip block in the board block diagram. The chip block diagram should appear, as shown in Figure 8. The JESD PLL should now be locked on both the board and chip block diagrams. Other parameters can be changed on both block diagrams, but do not need to be for this test. For more information about changing parameters in ACE, see the ACE Software Features section. | + | |
- | <WRAP center> | + | |
- | + | ||
- | | {{ {{ : | + | |
- | + | ||
- | | Figure 8. AD9135 chip block diagram | + | |
- | </ | + | |
- | + | ||
- | 3. On the DPGDownloader panel, seen in Figure 3, the Serial Line Rate in the should read 8Gbps.\\ \\ | + | |
- | + | ||
- | Click Download ({{: | + | |
- | + | ||
- | The current on the 5V supply should read about 1430mA. If you do not see the output, gently push the board toward the DPG3. This ensures that the board is firmly connected to the DPG3. The four registers codeGrpSync, | + | |
- | + | ||
- | 4. The output spectrum of the DAC should look like Figure 9 below. | + | |
- | <WRAP center> | + | |
- | | {{ {{ : | + | |
- | | Figure 9. AD9136/ | + | |
- | </ | + | |
- | + | ||
- | === Configuring SPI using the legacy SPI Application === | + | |
- | + | ||
- | 1. Open the AD9136/ | + | |
- | <WRAP center> | + | |
- | + | ||
- | | {{ {{ : | + | |
- | + | ||
- | | Figure 10. Entry Screen of the AD9136/AD9135 SPI software | + | |
- | </WRAP> | + | |
- | + | ||
- | 2. Configure the hardware according to the hardware set-up instructions given in the Hardware Setup section above. Set the frequency of the DAC clock signal generator to 1.6GHz, and the output level to 3dBm. The spectrum analyzer can be configured with Start Frequency = 1 MHz, Stop Frequency | + | |
- | 3. Follow the sequence below to configure the AD9136/ | + | |
- | a. The Links should be set to dual link. The JESD Mode is set to 8, Subclass 1 box checked, Interpolation set to 1, and FDAC set to 1.6GHz. Click “Commit” button to initialize the AD9136/ | + | |
- | b. At this point the Serial Line Rate in the DPG3 software panel should read 8Gbps.\\ \\ | + | |
- | + | ||
- | <WRAP center> | + | |
- | | {{ {{ : | + | |
- | | Figure 11. Configured panel of the AD9136/ | + | |
- | </ | + | |
- | + | ||
- | d. Click Download ({{: | + | |
- | + | ||
- | e. The current on the 5V supply should read about 1430mA. If you do not see the output, gently push the board toward the DPG3. This ensures that the board is firmly connected to the DPG3. The four registers codeGrpSync, | + | |
- | + | ||
- | 4. The output spectrum of the DAC should look like Figure 12 below. | + | |
- | <WRAP center> | + | |
- | | {{ {{ : | + | |
- | | Figure 12. AD9136/ | + | |
- | </WRAP> | + | |
- | + | ||
- | ===== ACE Software Features ===== | + | |
- | The ACE software is organized to allow the user to evaluate and control the AD9122A evaluation board. The “Initial Configuration” wizard, which is only available for certain boards, controls the DAC and PLL setups. Block diagram views of the board and chip contain elements that can be used to vary parameters like ref current and data format. These parameters can be changed using check boxes, drop down menus, and input boxes. Some parameters do not have settings shown in the diagram. Double click on the parameter to view the available settings, seen with the NCO settings below. | + | |
- | + | ||
- | {{ : | + | |
- | <WRAP clear> | + | |
- | </WRAP> | + | |
- | <WRAP centeralign> | + | |
- | + | ||
- | In addition, some parameters can be enabled or disabled. This feature is evident by the color of the block parameter. For example, if the block parameter is dark blue, the parameter is enabled. If it is light grey, it is disabled. To enable or disable a parameter, click on it. | + | |
- | + | ||
- | <WRAP column 40%> | + | |
- | {{ : | + | |
- | </ | + | |
- | <WRAP column 55%> | + | |
- | {{ : | + | |
- | </ | + | |
- | <WRAP clear> | + | |
- | </ | + | |
- | <WRAP column 40%> | + | |
- | <WRAP centeralign> | + | |
- | </ | + | |
- | <WRAP column 55%> | + | |
- | <WRAP centeralign> | + | |
- | </ | + | |
- | <WRAP clear> | + | |
- | </ | + | |
- | + | ||
- | More direct changes to registers and bit fields can be made in the memory map, which is linked from the chip block diagram through the “Proceed to Memory Map” button. In this view, names, addresses, and data can be manually altered by the user. | + | |
- | + | ||
- | {{ : | + | |
- | <WRAP clear> | + | |
- | </ | + | |
- | <WRAP centeralign> | + | |
- | + | ||
- | ACE also contains the Macro Tool, which can be used to record register reads and writes. This is executed in the memory map view or with the initialization wizard. To use, check the “Record Sub-Commands” checkbox and press the record button. Changes in the memory map, which are bolded until they are applied to the part, are recorded as UI commands by the macro tool once the changes are made. Changed register write commands for the controls are also recorded. Hit “Apply Changes” to execute the commands and make changes in the memory map. To stop recording, click the “Stop Recording” button. A macro tool page with the command steps will be created. The macro can be saved using the “Save Macro” button so that it may be loaded for future use. | + | |
- | + | ||
- | {{ : | + | |
- | <WRAP clear> | + | |
- | </ | + | |
- | <WRAP centeralign> | + | |
- | + | ||
- | The raw macro file will be saved using ACE syntax, which is not easily readable. To remedy this, the ACE software download includes the Macro to Hex Conversion Tool. The user can choose to include or exclude register write, reads, and/or comments in the conversion. The file pathways for the source and save paths should be the same, except that one should be an .acemacro file and the other should be a .txt file. The “Convert” button converts and opens the converted text file, which is easier to read. The conversion tool can also convert back to an .acemacro file if desired. | + | |
- | + | ||
- | <WRAP column 40%> | + | |
- | {{ : | + | |
- | </ | + | |
- | <WRAP column 55%> | + | |
- | {{ : | + | |
- | </ | + | |
- | <WRAP clear> | + | |
- | </ | + | |
- | <WRAP column 40%> | + | |
- | <WRAP centeralign> | + | |
- | </ | + | |
- | <WRAP column 55%> | + | |
- | <WRAP centeralign> | + | |
- | </ | + | |
- | <WRAP clear> | + | |
- | </ | + | |
- | For more information about ACE and its features, visit https:// | + | |
- | + | ||
- | + | ||
- | + | ||
- | + | ||
- | ==== Single-Tone Demonstration | + | |
- | === Single Tone Demo Lab Bench Configuration Procedure: === | + | |
- | These settings configure the AD9136/ | + | |
- | + | ||
- | Configure the hardware according to the hardware set-up instructions given in the Hardware Setup section above. Set the frequency of the DAC clock signal generator to 2.0GHz, and the output level to +3dBm. The spectrum analyzer can be configured as shown in Figure 7 with a resolution bandwidth of 100kHz. Choose an Input Attenuation of 24dB. \\ \\ | + | |
- | + | ||
- | <WRAP center> | + | |
- | | {{ {{ : | + | |
- | | Figure 3. Initial DPG Downloader Display | | + | |
- | </WRAP> \\ \\ | + | |
- | + | ||
- | === Single Tone Demo Hardware and Software Start Up Procedure: === | + | |
- | 1. Run DPG Downloader. | + | |
- | 2. Open SPIPro for AD9136/AD9135 by selecting AD9144, AD9136 & AD9135 SPI in All Programs/Analog Devices/ | + | |
- | 3. Select dual link, JESD mode 8, Interpolation = 1, FDAC = 2Ghz. Press ‘Configure DAC and Clock’ button. JESD204B PLL lock will turn green.\\ \\ | + | |
- | + | ||
- | <WRAP center> | + | |
- | | {{ {{ : | + | |
- | | Figure 4. Fully Configured AD9136 SPIPro Display | Figure 5. Fully Configured AD9135 SPIPro Display | | + | |
- | </ | + | |
- | + | ||
- | 4. In the DPG Downloader Window configure two single tone generated waveforms: | + | |
- | a. Select Single Tone under the Add Generated Waveforms Tab. Set Data Rate: 2Ghz, Desired Frequency: 112Mhz, Amplitude: | + | |
- | b. If using the AD9135,Set DAC Resolution to 11 bits\\ \\ | + | |
- | c. Select Single Tone under the Add Generated Waveforms Tab. Set Data Rate: 2Ghz, Desired Frequency: 221Mhz, Amplitude: -1dbFS, Uncheck Unsigned Data\\ \\ | + | |
- | d. If using the AD9135,Set DAC Resolution to 11 bits\\ \\ | + | |
- | 5. Select JESD Mode: Mode 11 (Mode 8, Dual Link)\\ \\ | + | |
- | 6. Populate the data playback selections for each DAC output as shown in Figure 6 or Figure 7. \\ \\ | + | |
- | 7. Click Download | + | |
- | + | ||
- | <WRAP center> | + | |
- | | {{ : | + | |
- | | Figure | + | |
- | </ | + | |
- | + | ||
- | 8. Here’s what you will see on DAC1 on the scope\\ \\ | + | |
- | <WRAP center> | + | |
- | | {{ : | + | |
- | |Figure 8. DAC1 Output Scope Display | | + | |
- | </ | + | |
- | + | ||
- | 9. Here is what you will see at the output | + | |
- | <WRAP center> | + | |
- | | {{ : | + | |
- | | | + | |
- | </ | + | |
- | \\ \\ | + |