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university:courses:electronics:text:chapter-10 [18 Nov 2015 03:16] – [10.2 Design Example] Doug Merceruniversity:courses:electronics:text:chapter-10 [12 Aug 2021 00:30] (current) – The symbol for inf Loknath Bharti
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 <WRAP centeralign > Figure 10.1 Two stage cascade amplifier </WRAP> <WRAP centeralign > Figure 10.1 Two stage cascade amplifier </WRAP>
  
-It is necessary to consider what happens when non-ideal amplifiers are put in series. Looking at the example in figure 10.1, it is clear that the input and output resistances (or impedances) come into play by reducing the overall gain. If the amplifiers were ideal (R<sub>out</sub> = 0 and R<sub>in</sub>8), and amplifier stages #1 and #2 had gains of A<sub>1</sub> and A<sub>2</sub>, the overall gain would simply be A<sub>1</sub>*A<sub>2</sub>. For the above example, let us now calculate the gain assuming nothing about the R<sub>in</sub> and R<sub>out</sub> of each stage, treating them as voltage dividers between the two stages and between the last stage and the output load. Note that in practice, impedances, Z<sub>in</sub>, Z<sub>out</sub>, would normally be used, not resistances, but the simple resistance will serve to illustrate the point here.+It is necessary to consider what happens when non-ideal amplifiers are put in series. Looking at the example in figure 10.1, it is clear that the input and output resistances (or impedances) come into play by reducing the overall gain. If the amplifiers were ideal (R<sub>out</sub> = 0 and R<sub>in</sub>), and amplifier stages #1 and #2 had gains of A<sub>1</sub> and A<sub>2</sub>, the overall gain would simply be A<sub>1</sub>*A<sub>2</sub>. For the above example, let us now calculate the gain assuming nothing about the R<sub>in</sub> and R<sub>out</sub> of each stage, treating them as voltage dividers between the two stages and between the last stage and the output load. Note that in practice, impedances, Z<sub>in</sub>, Z<sub>out</sub>, would normally be used, not resistances, but the simple resistance will serve to illustrate the point here.
  
 <WRAP indent > First amplification stage with loss between stage #1 and #2: </WRAP> <WRAP indent > First amplification stage with loss between stage #1 and #2: </WRAP>
university/courses/electronics/text/chapter-10.1447812993.txt.gz · Last modified: 18 Nov 2015 03:16 by Doug Mercer