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university:courses:electronics:m2k-uart-debug [03 Apr 2019 14:40] – [Background] Antoniu Miclaus | university:courses:electronics:m2k-uart-debug [21 May 2019 19:26] – Add reference to CLI demo, note about switch position. Mark Thoren | ||
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The objective of this tutorial is to use the Pattern Generator and Logic Analyzer instruments provided by the [[adi> | The objective of this tutorial is to use the Pattern Generator and Logic Analyzer instruments provided by the [[adi> | ||
- | As an example we will use as second device the [[adi> | + | The [[adi> |
===== Background ==== | ===== Background ==== | ||
- | Universal Asynchronous Receiver/ | + | A Universal Asynchronous Receiver/ |
- | The UART transmit | + | The UART transmitter |
<WRAP centeralign> | <WRAP centeralign> | ||
<WRAP centeralign> | <WRAP centeralign> | ||
- | UART transmits data asynchronously, | + | A UART transmits data asynchronously, |
{{: | {{: | ||
<WRAP centeralign> | <WRAP centeralign> | ||
- | When the UART receive | + | When the UART receiver |
- | UART transmitted | + | UART data is organized into bytes. Each byte contains 1 start bit, 5 to 9 data bits (depending on the UART), an optional parity bit, and 1 or 2 stop bits. |
<WRAP centeralign> | <WRAP centeralign> | ||
- | <WRAP centeralign> | + | <WRAP centeralign> |
- | The UART data transmission line is normally held at a high voltage level when no transmission is occurring. To start the transfer of data, the the transmission line is pulled from high to low. When the receiving UART detects the high to low voltage transition, it begins reading the bits in the data frame at the frequency of the baud rate. | + | The UART data transmission line is normally held at a high voltage level when no transmission is occurring. To start the transfer of data, the the transmission line is pulled from high to low. When the receiving UART detects the high to low voltage transition, it interprets this event as as start bit and begins reading |
- | Parity describes the evenness or oddness of a number. The parity bit is a way for the receiving UART to tell if any data has changed during transmission. Bits can be changed by mismatched baud rates, long distance data transfers, etc. | + | A parity bit may be included after the data bits. Parity describes the evenness or oddness of a number. |
Even parity: for a given set of bits, the occurrences of bits whose value is 1 is counted. If that count is odd, the parity bit value is set to 1. If the count of 1s in a given set of bits is already even, the parity bit value is 0. | Even parity: for a given set of bits, the occurrences of bits whose value is 1 is counted. If that count is odd, the parity bit value is set to 1. If the count of 1s in a given set of bits is already even, the parity bit value is 0. | ||
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Odd parity: for a given set of bits, if the count of bits with a value of 1 is even, the parity bit value is set to 1 . If the count of bits with a value of 1 is odd, the count is already odd so the parity bit value is 0. | Odd parity: for a given set of bits, if the count of bits with a value of 1 is even, the parity bit value is set to 1 . If the count of bits with a value of 1 is odd, the count is already odd so the parity bit value is 0. | ||
- | To signal the end of the data packet, the sending UART drives the data transmission line from a low voltage to a high voltage for at least two bit durations. | + | The parity bit is simple error detection scheme, and will detect all single-bit errors. Bits can be changed during transmission by mismatched baud rates, noise picked up on long distance data transfers, etc. Like baud rate, both transmitter and receiver must be set to the same parity configuration. |
+ | |||
+ | To signal the end of the data byte, the sending UART drives the data transmission line from a low voltage to a high voltage for at least two bit periods. | ||
===== Hardware Configuration ==== | ===== Hardware Configuration ==== | ||
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* Pin7 - DIO1 | * Pin7 - DIO1 | ||
* Pin8 - DIO0 | * Pin8 - DIO0 | ||
+ | |||
+ | **EVAL-ADICUP3029 UART switch configuration: | ||
+ | Set S2 to the CENTER position. | ||
+ | (S2 selects which device to connect the ADuCM3029' | ||
+ | |||
+ | ===== Software Configuration ==== | ||
+ | |||
+ | There are several options for which software to use for this demonstration; | ||
+ | |||
+ | [[https:// | ||
+ | |||
+ | |||
===== Scopy Pattern Generator Configuration ==== | ===== Scopy Pattern Generator Configuration ==== | ||
- | First, | + | First, |
The EVAL-ADICUP3029 software application has the UART configured as follows: | The EVAL-ADICUP3029 software application has the UART configured as follows: | ||
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<WRAP centeralign> | <WRAP centeralign> | ||
- | The Logic Analyzer must be set up to “catch” the UART packet | + | The Logic Analyzer must be set up to “catch” the UART byte transfer on the Logic Analyzer plot. Since the UART transfer starts |
<WRAP centeralign> | <WRAP centeralign> | ||
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The Logic Analyzer will wait for the falling edge of the Rx signal to be triggered (corresponding to the start bit). | The Logic Analyzer will wait for the falling edge of the Rx signal to be triggered (corresponding to the start bit). | ||
- | Run a single sweep on the Pattern Generator to send the first UART packet. | + | Run a single sweep on the Pattern Generator to send the first UART byte. |
The result captured by the Logic Analyzer is presented in Figure 10. | The result captured by the Logic Analyzer is presented in Figure 10. | ||
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<WRAP centeralign> | <WRAP centeralign> | ||
- | On the Logic Analyzer, adjust | + | On the Logic Analyzer, adjust the Time Base and Trigger Position |
Run Single sweep in The Logic Analyzer and then in the Pattern Generator. | Run Single sweep in The Logic Analyzer and then in the Pattern Generator. | ||
- | The result captured by the Logic Analyzer is presented | + | The result captured by the Logic Analyzer is shown in Figure 12. |
<WRAP centeralign> | <WRAP centeralign> | ||
<WRAP centeralign> | <WRAP centeralign> | ||
- | As expected all the data bytes were received by the EVAL-ADICUP3029 board and sent back on Tx pin. Each byte is sent back as soon as the receive action for one byte is finished. | + | The EVAL-ADICUP3029 example program echoes received data bytes as they come in. |
=====Conclusion===== | =====Conclusion===== |