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university:courses:electronics:electronics-lab-6 [24 Aug 2018 04:48] – Added scopy screenshots to the activities Trecia Agoylouniversity:courses:electronics:electronics-lab-6 [25 Jun 2020 22:07] (current) – external edit 127.0.0.1
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-====== Activity 6. BJT Current Mirror ======+====== Activity: BJT Current Mirror ======
  
 ===== Objective: ===== ===== Objective: =====
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 <WRAP centeralign> Figure 1 Current mirror test circuit </WRAP> <WRAP centeralign> Figure 1 Current mirror test circuit </WRAP>
  
-{{ :university:courses:electronics:a6n_f2.png?500 |}}+{{ :university:courses:electronics:a6n_f2.png? |}}
  
 <WRAP centeralign> Figure 2 Breadboard Connection of Current mirror test circuit </WRAP> <WRAP centeralign> Figure 2 Breadboard Connection of Current mirror test circuit </WRAP>
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 ===== Hardware Setup: ===== ===== Hardware Setup: =====
  
-In the current mirror configuration, the op amp serves as a virtual ground at the mirror input (base) node to convert the voltage steps from AWG 2 ( W2 output ) into current steps through the 1KΩ resistor. The collector voltage is swept using a ramp from AWG 1(output W1) set to 3V peak to peak with the offset to 1.5V. V<sub>CE</sub> of output device Q<sub>2</sub> is measured differentially by scope inputs 1+, 1-. The mirror output current is measured by scope inputs 2+. 2- across 1KΩ resistor, R<sub>2</sub>.+In the current mirror configuration, the op amp serves as a virtual ground at the mirror input (base) node to convert the voltage steps from AWG 2 ( W2 output ) into current steps through the 1KΩ resistor. The collector voltage is swept using a ramp from AWG 1(output W1). Load the stairstep.csv file, set amplitude to 3V peak-to-peak with the offset to 1.5V.  
 +V<sub>CE</sub> of output device Q<sub>2</sub> is measured differentially by scope inputs 1+, 1-. The mirror output current is measured by scope inputs 2+. 2- across 1KΩ resistor, R<sub>2</sub>.
 If you don't want to use the op-amp configuration the following simplified configuration can be used as well. If you don't want to use the op-amp configuration the following simplified configuration can be used as well.
  
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 <WRAP centeralign> Figure 3 Alt, Simple current mirror test circuit </WRAP> <WRAP centeralign> Figure 3 Alt, Simple current mirror test circuit </WRAP>
  
-{{ :university:courses:electronics:a6n_f4.png?500 |}}+{{ :university:courses:electronics:a6n_f4.png? |}}
  
 <WRAP centeralign> Figure 4 Breadboard Connection of Simple current mirror test circuit </WRAP> <WRAP centeralign> Figure 4 Breadboard Connection of Simple current mirror test circuit </WRAP>
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 =====Hardware Setup===== =====Hardware Setup=====
-{{ :university:courses:electronics:a6n_f7.png?500 |}}+{{ :university:courses:electronics:a6n_f7.png? |}}
  
 <WRAP centeralign> Figure 7 Breadboard Connection of Current Mirror with Base Current Compensation </WRAP> <WRAP centeralign> Figure 7 Breadboard Connection of Current Mirror with Base Current Compensation </WRAP>
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 <WRAP centeralign> Figure 9 Wilson current mirror </WRAP> <WRAP centeralign> Figure 9 Wilson current mirror </WRAP>
 =====Hardware Setup===== =====Hardware Setup=====
-{{ :university:courses:electronics:a6n_f10.png?500 |}}+{{ :university:courses:electronics:a6n_f10.png? |}}
  
 <WRAP centeralign> Figure 10 Breadboard Connection of Wilson current mirror </WRAP> <WRAP centeralign> Figure 10 Breadboard Connection of Wilson current mirror </WRAP>
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 <WRAP centeralign> Figure 12 Widlar current mirror </WRAP> <WRAP centeralign> Figure 12 Widlar current mirror </WRAP>
 =====Hardware Setup===== =====Hardware Setup=====
-{{ :university:courses:electronics:a6n_f13.png?500 |}}+{{ :university:courses:electronics:a6n_f13.png? |}}
  
 <WRAP centeralign> Figure 13 Breadboard Connection of Widlar current mirror </WRAP> <WRAP centeralign> Figure 13 Breadboard Connection of Widlar current mirror </WRAP>
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 =====Hardware Setup===== =====Hardware Setup=====
-{{ :university:courses:electronics:a6n_f16.png?500 |}}+{{ :university:courses:electronics:a6n_f16.png? |}}
  
 <WRAP centeralign> Figure 16 Breadboard Connection of Low input head room mirror </WRAP> <WRAP centeralign> Figure 16 Breadboard Connection of Low input head room mirror </WRAP>
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 Ideally the collector of PNP Q<sub>3</sub> would be connected to some negative voltage with respect to ground. Try connecting the collector of Q<sub>3</sub> to the negative board supply Vn. What happens? Can the input node of the mirror get even closer to ground now? Ideally the collector of PNP Q<sub>3</sub> would be connected to some negative voltage with respect to ground. Try connecting the collector of Q<sub>3</sub> to the negative board supply Vn. What happens? Can the input node of the mirror get even closer to ground now?
 +
 +<WRAP round download>
 +**Resources:**
 +  * Fritzing files: [[downgit>education_tools/tree/master/m2k/fritzing/bjt_current_mirror_bb | bjt_current_mirror_bb]]
 +  * LTspice files: [[downgit>education_tools/tree/master/m2k/ltspice/bjt_current_mirror_ltspice | bjt_current_mirror_ltspice]]
 +</WRAP>
  
 **Return to Lab Activity [[university:courses:electronics:labs|Table of Contents]]** **Return to Lab Activity [[university:courses:electronics:labs|Table of Contents]]**
university/courses/electronics/electronics-lab-6.1535078923.txt.gz · Last modified: 24 Aug 2018 04:48 by Trecia Agoylo

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