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— | university:courses:electronics:electronics-lab-1st [29 Mar 2018 11:19] – [Procedure:] add Scopy plot Antoniu Miclaus | ||
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+ | ====== Op Amp Settling Time ====== | ||
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+ | ===== Settling Time Background: ===== | ||
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+ | The settling time of an amplifier or any signal chain for that matter is defined as the time it takes the output to respond to a step change in the input and come into, and remain within a defined error band around the final value, as measured relative to the 50% point of the input pulse, as shown in figure 1 below. | ||
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+ | {{ : | ||
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+ | <WRAP centeralign> | ||
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+ | * Error band is usually defined to be a percentage of the step 1%, 0.5%, 0.1%, etc. | ||
+ | * Settling time is often non-linear; it may take 30 times as long to settle to 0.01% as to 0.1%. | ||
+ | * Manufacturers often choose an error band which makes the op amp look good. | ||
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+ | Unlike a Digital-to-Analog Converter, there is no obvious error band for an op amp (a DAC naturally has an error band of 1 LSB, or perhaps ±1 LSB). So, an appropriate band must be chosen and defined, along with other definitions, | ||
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+ | It should also be noted that thermal effects can cause significant differences between short-term settling time (generally measured in nanoseconds) and long-term settling time (generally measured in microseconds or milliseconds). In many AC applications, | ||
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+ | ==== Measuring Settling Time: ==== | ||
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+ | Measuring fast settling time to high accuracy is very difficult. Great care is required in order to generate fast, highly accurate, low noise, flat top pulses. Large amplitude step voltages will overdrive many oscilloscope front ends, when the input scaling is set for high sensitivity. | ||
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+ | ==== Materials: ==== | ||
+ | ADALM2000 Active Learning Module\\ | ||
+ | Solder-less breadboard, and jumper wire kit\\ | ||
+ | 2 10 kΩ resistors\\ | ||
+ | 1 10 kΩ potentiometer\\ | ||
+ | 2 Schottky diodes (the 1N914 Si diodes supplied in the ADALP2000 Analog Parts Kit can be used but will not work as well)\\ | ||
+ | 1 OP27 op-amp\\ | ||
+ | 1 OP37 op-amp\\ | ||
+ | 1 OP97 ( slow settling amplifier not normally supplied with the Analog Parts Kit )\\ | ||
+ | 2 0.1uF Capacitors (used to de-couple the Vp and Vn power supplies)\\ | ||
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+ | ==== Directions: ==== | ||
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+ | Build the test setup as shown in figure 2 below. Remember to supply power to the op amp, +5 V to pin 7 and -5V to pin 4 with 0.1uF capacitors used to de-couple the Vp and Vn power supplies. This arrangement is useful in making settling time measurements on op amps such as this operating in the inverting mode. The signal at the "false summing node" ( the wiper of the potentiometer ) represents the difference between the output and the input signal, multiplied by the constant k., i.e. the Error signal. | ||
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+ | {{ : | ||
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+ | <WRAP centeralign> | ||
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+ | {{ : | ||
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+ | There are many subtleties involved in making this setup work reliably. The resistances should be low in value, to minimize parasitic time constants. The back to back Schottky diode clamps, D< | ||
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+ | ==== Hardware Setup: ==== | ||
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+ | Waveform generator 1 should be configured for a 60 KHz square wave 1V amplitude and 0 volt offset. Scope channel 1 is used to monitor the input square wave and should be set to 500 mV/div and used as the trigger source. Scope channel 2 is used to alternately measure the op amp output, V< | ||
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+ | <WRAP centeralign> | ||
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+ | <WRAP centeralign> | ||
+ | ==== Procedure: ==== | ||
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+ | First use a OP27 amplifier from the Analog Parts Kit for your measurements. The potentiometer should be set near the center of its adjustment range beforehand and should be fine-tuned such that the flat portion of both halves of the signal are nearly equal and centered near 0 Volts, note figure 3. Export the Error waveform showing the settling to both rising and falling input steps for inclusion in your Lab report. You can also store the Error waveform, scope channel 2, for the OP27 as a reference waveform (R1) for future comparison to the settling response of other amplifiers. | ||
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+ | Next replace the OP27 amplifier with a OP37 amplifier from the Parts Kit. Again export the Error waveform showing the settling to both rising and falling input steps for inclusion in your Lab report. Overlay the OP37 settling waveform with the saved reference waveform of the OP27. Compare the settling time and general characteristics of each. You should also again store the Error waveform, scope channel 2, for the OP37 as a reference waveform (R2) for future comparison. | ||
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+ | Finally replace the OP37 with the much slower settling OP97 amplifier if you have one available. Again export the Error waveform showing the settling to both rising and falling input steps for inclusion in your Lab report. Overlay the OP97 settling waveform with the saved reference waveforms of the OP27 and OP37. Compare the settling time and general characteristics of each. | ||
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+ | {{ : | ||
+ | |||
+ | <WRAP centeralign> | ||
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+ | ==== Questions: ==== | ||
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+ | The faster amplifiers show a ringing settling characteristic. What circuit component(s) could you add to remove the ringing ( perhaps at the cost of a longer settling time )? | ||
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+ | Try using lower value resistors for R< | ||
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+ | ==== Additional Background on settling time measurements: | ||
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+ | In some cases, a second (very fast) amplifier stage may be used after the false summing node, to increase the Error signal level. Many modern digitizing oscilloscopes, | ||
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+ | In making settling time measurements of this type, it is also imperative to use a pulse source capable of generating a pulse of very fast rise and fall times and sufficient flatness. In other words, if the op amp under test has a settling time of 20 nSec to 0.1%, the applied pulse should settle to better than 0.05% in less than 5 nSec. This is beyond the capabilities of the AWG sources built into the ADALM2000 module. | ||
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+ | This type of source can be expensive, but a simple circuit as shown in Figure 4 can be used with a reasonably flat generator to ensure a flat pulse output. | ||
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+ | {{ : | ||
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+ | <WRAP centeralign> | ||
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+ | The circuit in figure 4 works best if low capacitance Schottky diodes are used for D< | ||
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+ | ==== For further reading: ==== | ||
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+ | http:// | ||
+ | http:// | ||
+ | http:// | ||
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+ | Return to Lab Activities [[university: | ||