Wiki

Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Next revision
Previous revision
university:courses:electronics:electronics-lab-15 [30 Oct 2012 15:52] – created Doug Merceruniversity:courses:electronics:electronics-lab-15 [14 Jun 2022 14:07] (current) – [Appendix: Making an NAND / AND gate with the CD4007 transistor array] Doug Mercer
Line 1: Line 1:
-====== Activity 15. DC-DC Converters I ======+====== ActivityDC-DC Converters I - ADALM2000======
  
 ===== Objective: ===== ===== Objective: =====
Line 11: Line 11:
  
 ===== Materials: ===== ===== Materials: =====
-Analog Discovery Lab hardware\\+ADALM2000 Active Learning Module\\
 Solder-less breadboard\\ Solder-less breadboard\\
 Jumper wires\\ Jumper wires\\
-1 - LM2901 quad comparator (or similar device like a CMOS single supply opamp)\\ +1 - AD8541 CMOS single supply opamp used as a comparator (or AD8561 comparator)\\ 
-1 - 74HC00 quad CMOS NAND gate (or similar device)\\+1 - 74HC00 quad CMOS NAND gate (or CD4007 see Appendix)\\
 1 - ZVN2110A NMOS FET (2N7000 or power FET device such as IRF510)\\ 1 - ZVN2110A NMOS FET (2N7000 or power FET device such as IRF510)\\
-1 - 20KΩ resistor\\ +1 - 20 KΩ resistor\\ 
-1 - 10KΩ resistor\\ +1 - 10 KΩ resistor\\ 
-1 - 4.7KΩ resistor\\ +1 - 1 mH inductor\\ 
-- 1mH inductor\\ +1 - 47 uF capacitor\\ 
-1 - 47uF capacitor\\ +1 - 220 uF capacitor\\ 
-1 - 220uF capacitor\\ +2 - rectifier diodes (1N4001, 1N3064)
-2 - rectifier diodes (1N4001, 1N3064)\\+
  
 ===== Additional Equipment: ===== ===== Additional Equipment: =====
Line 31: Line 30:
 ===== Simple inductor and switch DC/DC Converter: ===== ===== Simple inductor and switch DC/DC Converter: =====
  
-Build the circuit in figure 1 on your solder-less breadboard. Note that in this inductor based DC to DC converter the spikes of current needed may exceed the limits of the on-board +5V supply of Discovery and cause it to shut down. You should use a standalone wall powered bench supply or batteries. You can use a 1N4001 or a 1N3064 for the rectifier diode. Start with a load resistance of 100kΩ and a switching frequency of 10 kHz which can be supplied by AWG1. What is the DC voltage of the "boosted" output? Record the value for your lab report.+Build the circuit in figure 1 on your solder-less breadboard. Note that in this inductor based DC to DC converter the spikes of current needed may exceed the limits of the on-board +5V supply of ADALM2000 and cause it to shut down. You should use a standalone wall powered bench supply or batteries. You can use a 1N4001 or a 1N3064 for the rectifier diode. Start with a load resistance of 100kΩ and a switching frequency of 10 kHz which can be supplied by AWG1. What is the DC voltage of the "boosted" output? Record the value for your lab report.
  
 {{ :university:courses:electronics:a15_f1.png?600 |}} {{ :university:courses:electronics:a15_f1.png?600 |}}
Line 47: Line 46:
 ===== Directions: ===== ===== Directions: =====
  
-The breadboard connections for the regulated version are as shown in figure 2. The DMM should be connected to measure the voltage at V<sub>OUT</sub>. The +5V bench power supply should be connected to the V<sub>IN</sub> node. The output of the arbitrary waveform generator, serving as a DC reference voltage, drives the positive input of the comparator at pin 9. The digital clock output drives the second input of the first NAND gate at pin 2. Scope input 2+ (single ended) is connected to the output of the comparator at pin 14. Diode D<sub>2</sub> is not required if a power FET, such as the IRF510, is used because devices such as that have the diode built in.+The breadboard connections for the regulated version are as shown in figure 2. The DMM should be connected to measure the voltage at V<sub>OUT</sub>. The +5V bench power supply should be connected to the V<sub>IN</sub> node. The output of the arbitrary waveform generator, serving as a DC reference voltage, drives the positive input of the comparator at pin 3. The digital clock output drives the second input of the first NAND gate at pin 2. Scope input 2+ (single ended) is connected to the output of the comparator at pin 6. Diode D<sub>2</sub> is not required if a power FET, such as the IRF510, is used because devices such as that have the diode built in.
  
-{{ :university:courses:electronics:a15_f2.png?550 |}}+{{ :university:courses:electronics:a15_f2a.png?550 |}}
  
 <WRAP centeralign> Figure 2 Regulated DC to DC boost converter </WRAP> <WRAP centeralign> Figure 2 Regulated DC to DC boost converter </WRAP>
Line 55: Line 54:
 ===== Hardware Setup: ===== ===== Hardware Setup: =====
  
-The waveform generator should be configured for DC output and 2.5V offset. The digital clock output should be configured for a 50% duty cycle and 100 KHz output frequency. One of the digital outputs from the Analog Discovery could be programed for this or the second AWG output could be used as well. The single ended input of scope channel 1 ( 1+ ) is used to measure the signal seen at the output of the analog voltage comparator.+The signal generator should be configured for constant DC output of 2.5V. The digital clock output should be configured for a 50% duty cycle and 100 KHz output frequency. One of the digital outputs from the ADALM2000 could be programed for this or the second AWG output could be used as well. The single ended input of scope channel 1 ( 1+ ) is used to measure the signal seen at the output of the analog voltage comparator.
  
 ===== Procedure: ===== ===== Procedure: =====
  
-Be sure to start up the waveform generator and digital clock outputs on the Analog Discovery Lab board before turning on the +5V bench supply. The regulated output voltage at node Vout should be observed as the DC offset value of the waveform generator is adjusted. It should be equal to 3 times ( (R<sub>1</sub>+R<sub>2</sub>)/R<sub>1</sub>) ) the DC value of V<sub>REF</sub>.+Be sure to start up the waveform generator and digital clock outputs on the ADALM2000 board before turning on the +5V bench supply. The regulated output voltage at node Vout should be observed as the DC offset value of the waveform generator is adjusted. It should be equal to 3 times ( (R<sub>1</sub>+R<sub>2</sub>)/R<sub>1</sub>) ) the DC value of V<sub>REF</sub>.
  
 ===== Questions: ===== ===== Questions: =====
Line 79: Line 78:
  
 ===== Materials: ===== ===== Materials: =====
-1 - LM2901 quad comparator (or similar device)\\ +1 - AD8541 CMOS single supply opamp used as a comparator (or AD8561 comparator)\\ 
-1 - 74HC00 quad NAND gate (or similar device)\\+1 - 74HC00 quad NAND gate (or CD4007 see Appendix)\\
 1 - generic PNP transistor (TIP32 or similar device)\\ 1 - generic PNP transistor (TIP32 or similar device)\\
 1 - 20KΩ resistor\\ 1 - 20KΩ resistor\\
 1 - 10KΩ resistor\\ 1 - 10KΩ resistor\\
-1 - 4.7KΩ resistor\\ 
 1 - 2.2KΩ resistor\\ 1 - 2.2KΩ resistor\\
 1 - 1mH inductor\\ 1 - 1mH inductor\\
Line 97: Line 95:
 ===== Directions: ===== ===== Directions: =====
  
-The breadboard connections are as shown in the diagram below. The DMM should be connected to measure the voltage at Vout . The +5V bench power supply should be connected to the Vin node. The output of the function generator drives the negative input of the comparator at pin 8. The digital clock output drives the second input of the NAND gate at pin 2. Scope input 2+ (single ended) is connected to the output of the comparator at pin 14.+The breadboard connections are as shown in the diagram below. The DMM should be connected to measure the voltage at V<sub>OUT</sub> . The +5V bench power supply should be connected to the V<sub>IN</sub> node. The output of the waveform generator drives the negative input of the comparator at pin 2. The digital clock output drives the second input of the NAND gate at pin 5. Scope input 2+ (single ended) is connected to the output of the comparator at pin 6.
  
-{{ :university:courses:electronics:a15_f3.png?550 |}}+{{ :university:courses:electronics:a15_f3a.png?550 |}}
  
 <WRAP centeralign> Figure 3 Inverting DC - DC Converter </WRAP> <WRAP centeralign> Figure 3 Inverting DC - DC Converter </WRAP>
Line 105: Line 103:
 ===== Hardware Setup: ===== ===== Hardware Setup: =====
  
-The waveform generator should be configured for DC output and 2.5V offset. The digital clock output should be configured for a 50% duty cycle and 100 KHz output frequency. The Single ended input of scope channel 1 (1+) is used to measure the output of the analog voltage comparator.+The signal generator should be configured for constant DC output of 2.5V. The digital clock output should be configured for a 50% duty cycle and 100 KHz output frequency. The Single ended input of scope channel 1 (1+) is used to measure the output of the analog voltage comparator.
  
 ===== Procedure: ===== ===== Procedure: =====
  
-Be sure to start up the waveform generator and digital clock outputs on the Analog Discovery Lab board before turning on the +5V bench supply. The regulated output voltage at node V<sub>OUT</sub> should be observed as the DC offset value of the waveform generator is adjusted. It should be equal to - V<sub>REF</sub>when V<sub>REF</sub> is set to 2.5V (assuming V<sub>IN</sub> is +5V).+Be sure to start up the wsignal generator and digital clock outputs on the ADALM2000 board before turning on the +5V bench supply. The regulated output voltage at node V<sub>OUT</sub> should be observed as the DC offset value of the waveform generator is adjusted. It should be equal to - V<sub>REF</sub>when V<sub>REF</sub> is set to 2.5V (assuming V<sub>IN</sub> is +5V).
  
 ===== Questions: ===== ===== Questions: =====
Line 124: Line 122:
 ===== Circuit Additions: ===== ===== Circuit Additions: =====
  
-What sort of circuit could you make to generate the 100 KHz square wave other than using the digital clock output on the Discovery Lab board? There are two additional gates in the 74HC00 package. The other two NAND gates along with RC delay network, R<sub>4</sub> C<sub>4</sub> can be configured into a ring oscillator as shown below. The values for R<sub>4</sub> and C<sub>4</sub> are approximate for 100 KHz and can be adjusted as needed.+What sort of circuit could you make to generate the 100 KHz square wave other than using the digital clock output on the ADALM2000 board? There are two additional gates in the 74HC00 package. The other two NAND gates along with RC delay network, R<sub>4</sub> C<sub>4</sub> can be configured into a ring oscillator as shown below. The values for R<sub>4</sub> and C<sub>4</sub> are approximate for 100 KHz and can be adjusted as needed.
  
 {{ :university:courses:electronics:a15_f4.png?450 |}} {{ :university:courses:electronics:a15_f4.png?450 |}}
Line 133: Line 131:
  
 What other types of oscillator circuits might be used to generate the 100 KHz square wave?\\  What other types of oscillator circuits might be used to generate the 100 KHz square wave?\\ 
-The DC reference voltage from the waveform generator output of the Analog Discovery Lab board could be replaced by the band-gap reference circuit from Activity 8 in this series. The +5V supply can be connected where reference input is shown in the diagram and R<sub>1</sub> and R<sub>2</sub> adjusted to produce the desires reference voltage ( where  2+ is shown ) to be used at the plus input of the LM2901 comparator.+The DC reference voltage from the waveform generator output of the ADALM2000 board could be replaced by the band-gap reference circuit from Activity 8 in this series. The +5V supply can be connected where reference input is shown in the diagram and R<sub>1</sub> and R<sub>2</sub> adjusted to produce the desires reference voltage ( where  2+ is shown ) to be used at the plus input of the LM2901 comparator.
  
 {{ :university:courses:electronics:a15_f5.png?500 |}} {{ :university:courses:electronics:a15_f5.png?500 |}}
Line 143: Line 141:
 What other types of reference circuits might be used to generate DC voltage needed for the plus input of the comparator? What other types of reference circuits might be used to generate DC voltage needed for the plus input of the comparator?
  
 +====== Appendix: Making an NAND / AND gate with the CD4007 transistor array ======
 +
 +Below is the schematic and pinout for the CD4007:
 +
 +{{ :university:courses:alm1k:cd4007_pinout.png?420 |}}
 +
 +<WRAP centeralign> Figure 6 CD4007 CMOS transistor array pinout </WRAP>
 +
 +As shown in figure 7, one 2 input NAND gate and one inverter can be built from one CD4007 package. Configure the NAND gate as shown below by connecting pins 12 and 13 together as the NAND output. Pin 14 and pin 11 is connected to V<sub>DD</sub> for power and pin 7 V<sub>SS</sub> to ground. Pin 9 should be tied to pin 8 to complete N side of the NAND gate. Pin 6 will be the A input and pin 10 will be the B input.
 +
 +{{ :university:courses:electronics:a15_f7.png?600 |}}
 +
 +<WRAP centeralign> Figure 7 2 input NAND and Inverter </WRAP>
 +
 +The Inverter is made by connecting pin 2 to V<sub>DD</sub>, pin 4 to V<sub>SS</sub>, pins 1 and 5 are connected together as the output and with pin 3 as the input.
 +
 +An AND gate is made by connecting the output of the NAND at pins 12 and 13 to the inverter input at pin 3.
 +
 +**Return to Lab Activity [[university:courses:electronics:labs|Table of Contents]]**
  
  
university/courses/electronics/electronics-lab-15.txt · Last modified: 14 Jun 2022 14:07 by Doug Mercer