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university:courses:alm1k:alm-signals-labs:alm-phase-locked-loop-lab [03 Jan 2021 22:12] – fix links Robin Getz | university:courses:alm1k:alm-signals-labs:alm-phase-locked-loop-lab [07 Feb 2022 15:22] (current) – [Activity: The Phase Locked Loop.] Doug Mercer | ||
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- | ======Activity: | + | ======Activity: |
=====Objective: | =====Objective: | ||
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====Step 2 Directions: | ====Step 2 Directions: | ||
- | Next add the XOR gate phase detector circuit from an earlier Lab on you breadboard as shown in figure 3. After constructing the XOR gate connect it to the V to F circuit as shown in figure 4 to make the complete PLL. Be sure to turn off or disconnect the +5 V power supply before making any additions to your circuit. An XOR gate from a 74HC86 can be substituted if available. Or build an XOR gate using Inverters, AND, OR gates as in this [[https:// | + | Next add the XOR gate phase detector circuit from an earlier Lab on you breadboard as shown in figure 3. After constructing the XOR gate connect it to the V to F circuit as shown in figure 4 to make the complete PLL. Be sure to turn off or disconnect the +5 V power supply before making any additions to your circuit. An XOR gate from a 74HC86 can be substituted if available. Or build an XOR gate using Inverters, AND, OR gates as in this [[/ |
{{ : | {{ : | ||
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<WRAP centeralign> | <WRAP centeralign> | ||
- | The divide by two circuit from the [[https:// | + | The divide by two circuit from the [[/ |
**For Further Reading:** | **For Further Reading:** |