This version (25 Jul 2012 21:04) was *approved* by Brett Gildersleeve.

The information here is preliminary.

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Category | Algorithm | Executed Instructions | Program RAM | DATA Ram | Parameter RAM | Description | Processors | ||
---|---|---|---|---|---|---|---|---|---|

Logic | Absmax | 22 | 22 | 3 | 0 | Outputs the input signal with the largest magnitude on a sample by sample basis. | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | Absmax (Grow) | 9 | 9 | 0 | 0 | Adds another data input to the block. | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | Absmax And Hold | 24 | 24 | 6 | 0 | Outputs the input signal with the largest magnitude on a sample by sample basis. The value will be held until the block it is reset (via the reset pin). | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | Absmax And Hold (Grow) | 20 | 20 | 0 | 0 | Adds another data input to the block. | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | Max | 14 | 14 | 2 | 0 | Outputs the input signal with the greatest value on a sample by sample basis. Takes sign into account. | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | Max (Grow) | 6 | 6 | 0 | 0 | Adds another data input to the Max block. | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | Max And Hold | 18 | 18 | 5 | 0 | Outputs the input signal with the greatest value on a sample by sample basis. Takes sign into account. The value value is held until the block is reset (via the reset pin). | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | Max And Hold (Grow) | 16 | 16 | 0 | 0 | Adds another data input to the Max And Hold block. | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | AB In/Out Condition | 6 | 6 | 1 | 0 | Lets you compare the sample-by-sample level of two incoming signals (AB) and output the sample of the signal meeting the condition. | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | AB In CD Out Condition | 6 | 6 | 1 | 0 | Lets you compare the sample-by-sample level of two incoming signals (AB) and output the sample of one of two new signals (CD), depending on the condition. | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | Buffer Gate | 4 | 4 | 1 | 1 | Takes any input and compares the value to 0. If the input is zero, the output will be zero. If the input is 1, the output will be 1. | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | Buffer Gate (Grow) | 4 | 4 | 1 | 0 | Adds a channel to the Buffer Gate algorithm. | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | Zero Comparator | 4 | 4 | 1 | 1 | Takes any input and compares the value to 0. If the value is non-zero, the output will be zero. If the input is zero, the output will be a flag of “1” in the bit position designated by the drop-down box. | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | Signal Invert | 2 | 2 | 1 | 1 | Takes the incoming signal, inverts its polarity, and outputs the inverted signal. | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | Oneshot Fall | 5 | 5 | 4 | 1 | Outputs a trigger signal based upon the falling edge of the input signal. | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | Oneshot Fall, Reset | 9 | 9 | 4 | 1 | Outputs a trigger signal based upon the falling edge of the input signal. The reset pin clears the output pin back to 0. | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | Oneshot Rise | 5 | 5 | 4 | 1 | Outputs a trigger signal based upon the rising edge of the input signal. | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | Oneshot Rise, Reset | 9 | 9 | 4 | 1 | Outputs a trigger signal based upon the rising edge of the input signal. The reset pin clears the output pin back to 0. | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | Min | 15 | 15 | 2 | 0 | Outputs the input signal with the least value on a sample by sample basis. Takes sign into account. | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | Min (Grow) | 6 | 6 | 0 | 0 | Adds another data input to the Min block. | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | Value Cross Detection | 15 | 15 | 4 | 1 | Outputs a pulse every time the input signal has crossed the value specified in the cells. | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | Value Cross Detection (Grow) | 15 | 15 | 3 | 1 | Adds another channel to the block, resulting in another Value Cross Detection algorithm. | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | Tolerance Analyzer | 15 | 15 | 2 | 2 | You can use this to verify a given value's tolerance limits. | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | Tolerance Analyzer (Grow) | 15 | 15 | 1 | 2 | Adds another channel to the block, resulting in another Tolerance Analyzer algorithm. | ADAU144x, ADAU176x, ADAU1781 | ||

Logic | Not Bit-Wise | Logic-And | 13 | 13 | 2 | 0 | Applies the 'And' logic operation to the two input signals and outputs and the result on the output pin. | ADAU144x, ADAU176x, ADAU1781 | |

Logic | Not Bit-Wise | Logic-Nan | 15 | 15 | 2 | 0 | Applies the 'Nand' operation to the two input signals and outputs and the result on the output pin. | ADAU144x, ADAU176x, ADAU1781 | |

Logic | Not Bit-Wise | Logic-Or | 13 | 13 | 2 | 0 | Applies the 'Or' logic operation to the two input signals and outputs and the result on the output pin. | ADAU144x, ADAU176x, ADAU1781 | |

Logic | Not Bit-Wise | Logic-Nor | 15 | 15 | 2 | 0 | Applies the 'Nor' logic operation to the two input signals and outputs and the result on the output pin. | ADAU144x, ADAU176x, ADAU1781 | |

Logic | Not Bit-Wise | Logic-Xor | 13 | 13 | 2 | 0 | Applies the 'Xor' logic operation to the two input signals and outputs and the result on the output pin. | ADAU144x, ADAU176x, ADAU1781 | |

Logic | Bit-Wise | Logic-And | 6 | 6 | 1 | 2 | Applies the 'And' logic operation to the two input signals and outputs and the result on the output pin. | ADAU144x, ADAU176x, ADAU1781 | |

Logic | Bit-Wise | Logic-Nand | 8 | 8 | 1 | 2 | Applies the 'Nand' operation to the two input signals and outputs and the result on the output pin. | ADAU144x, ADAU176x, ADAU1781 | |

Logic | Bit-Wise | Logic-Or | 6 | 6 | 1 | 2 | Applies the 'Or' logic operation to the two input signals and outputs and the result on the output pin. | ADAU144x, ADAU176x, ADAU1781 | |

Logic | Bit-Wise | Logic-Nor | 8 | 8 | 1 | 2 | Applies the 'Nor' logic operation to the two input signals and outputs and the result on the output pin. | ADAU144x, ADAU176x, ADAU1781 | |

Logic | Bit-Wise | Logic-Xor | 6 | 6 | 1 | 2 | Applies the 'Xor' logic operation to the two input signals and outputs and the result on the output pin. | ADAU144x, ADAU176x, ADAU1781 | |

Arithmetic Operations | Absolute Value | 3 | 3 | 1 | 0 | Convert all negative components of the input signal to positive value with the same magnitude. | ADAU144x, ADAU176x, ADAU1781 | ||

Arithmetic Operations | Signal Add | 3 | 3 | 1 | 0 | Sums the inputs together. | ADAU144x, ADAU176x, ADAU1781 | ||

Arithmetic Operations | Signal Add (Grow) | 1 | 1 | 0 | 0 | Adds another input to the Signal Add block. | ADAU144x, ADAU176x, ADAU1781 | ||

Arithmetic Operations | Square Root | 81 | 81 | 3 | 0 | Outputs the square root of the input. | ADAU144x, ADAU176x, ADAU1781 | ||

Arithmetic Operations | Square Root (Grow) | 81 | 81 | 2 | 0 | Adds another channel of the Square Root algorithm to the block. | ADAU144x, ADAU176x, ADAU1781 | ||

Arithmetic Operations | Square Root (Grow High Precision) | 141 | 141 | 2 | 0 | Adds another channel of the High Precision Square Root Algorithm to the block. | ADAU144x, ADAU176x, ADAU1781 | ||

Arithmetic Operations | Ultra Precision | Square Root | 141 | 141 | 3 | 0 | Outputs the square root of the input. | ADAU144x, ADAU176x, ADAU1781 | |

Arithmetic Operations | Ultra Precision | Square Root (Grow) | 81 | 81 | 2 | 0 | Adds another channel of the Square Root algorithm to the block. | ADAU144x, ADAU176x, ADAU1781 | |

Arithmetic Operations | Ultra Precision | Square Root (Grow High Precision) | 141 | 141 | 2 | 0 | Adds another channel of the High Precision Square Root Algorithm to the block. | ADAU144x, ADAU176x, ADAU1781 | |

Arithmetic Operations | Signal Subtract | 3 | 3 | 1 | 0 | Performs a subtraction operation on the input pins and outputs the difference result. | ADAU144x, ADAU176x, ADAU1781 | ||

Arithmetic Operations | Signal Subtract (Grow) | 1 | 1 | 0 | 0 | Adds another input to the Signal Subtract block. | ADAU144x, ADAU176x, ADAU1781 | ||

Arithmetic Operations | Divide | 53 | 53 | 9 | 33 | Divides the two incoming signals using the Newton-Raphson iteration. | ADAU144x, ADAU176x, ADAU1781 | ||

Arithmetic Operations | Multiply | 5 | 5 | 2 | 0 | Multiplies two signals together. | ADAU144x, ADAU176x, ADAU1781 | ||

Arithmetic Operations | Multiply (Grow) | 5 | 5 | 1 | 0 | Adds another two inputs to be multiplied and a corresponding output. | ADAU144x, ADAU176x, ADAU1781 | ||

DSP Functions | Fractional Delay | 17 | 17 | 6 | 3 | Delays the input signal in time with sub sample period delays possible. | ADAU144x, ADAU176x, ADAU1781 | ||

DSP Functions | Fractional Delay (Grow) | 8 | 8 | 4 | 0 | Adds another channel of the Fractional Delay algorithm to the block. | ADAU144x, ADAU176x, ADAU1781 | ||

DSP Functions | Fractional | Multi-Tap Voltage Controlled Delay | 16 | 16 | 6 | 2 | Provides a variable delay to a single audio input, producing multiple outputs. | ADAU144x, ADAU176x, ADAU1781 | |

DSP Functions | Fractional | Multi-Tap Voltage Controlled Delay (Grow) | 12 | 12 | 1 | 0 | Adds another delay tap as well as a corresponding output. | ADAU144x, ADAU176x, ADAU1781 | |

DSP Functions | Multi-Tap Voltage Controlled Delay | 16 | 16 | 4 | 1 | Provides a variable delay to a single audio input, producing multiple outputs. | ADAU144x, ADAU176x, ADAU1781 | ||

DSP Functions | Multi-Tap Voltage Controlled Delay (Grow) | 12 | 12 | 1 | 0 | Adds another delay tap, as well as a corresponding output. | ADAU144x, ADAU176x, ADAU1781 | ||

DSP Functions | Delay | 5 | 5 | 3 | 1 | Outputs a delayed version of the input signal. | ADAU144x, ADAU176x, ADAU1781 | ||

DSP Functions | Delay (Grow) | 4 | 4 | 3 | 0 | Adds another input as well as a corresponding output to the block. | ADAU144x, ADAU176x, ADAU1781 | ||

DSP Functions | Real Time Display | 3 | 3 | 1 | 1 | Reads back the instantaneous signal level from hardware over the I2C or SPI control port. Limited by the speed of the communications port. | ADAU144x, ADAU176x, ADAU1781 | ||

DSP Functions | DSP Readback | 3 | 3 | 1 | 1 | Lets you read values back from the DSP at any point in your schematic design. | ADAU144x, ADAU176x, ADAU1781 | ||

DSP Functions | DSP Readback (Grow) | 3 | 3 | 2 | 2 | Adds another identical version of the DSP Readback algorithm to the block. | ADAU144x, ADAU176x, ADAU1781 | ||

DSP Functions | Value Hold | 8 | 8 | 3 | 0 | Retains an incoming signal (green pin). The signal is held based on the presence and level of a control signal(red pin). | ADAU144x, ADAU176x, ADAU1781 | ||

DSP Functions | Feedback | 2 | 2 | 2 | 0 | Generates a delay in the signal path and reroutes signal to an input occurring earlier in the path. | ADAU144x, ADAU176x, ADAU1781 | ||

Index LUT | Linear Interpolator | 18 | 18 | 6 | 8 | Maps an input function to a set of data points that are stored in an index table. | ADAU144x, ADAU176x, ADAU1781 | ||

Adjustable Gain | No Slew | Linear Gain | 3 | 3 | 1 | 1 | Scales the signal by the value specified in the text field. | ADAU144x, ADAU176x, ADAU1781 | |

Adjustable Gain | No Slew | Linear Gain (Grow No Slew) | 3 | 3 | 1 | 1 | Adds a channel of a No Slew Linear Gain algorithm to the block. | ADAU144x, ADAU176x, ADAU1781 | |

Adjustable Gain | No Slew | Linear Gain (Grow RC Slew) | 7 | 7 | 3 | 3 | Adds a channel of an RC Slew Linear Gain algorithm to the block. | ADAU144x, ADAU176x, ADAU1781 | |

Adjustable Gain | No Slew | Linear Gain (Grow RC Slew With Gain Output) | 9 | 9 | 4 | 3 | Adds a channel of an RC Slew With Gain Output Linear Gain algorithm to the block. | ADAU144x, ADAU176x, ADAU1781 | |

Adjustable Gain | Clickless SW Slew | Linear Gain | 7 | 7 | 3 | 3 | Scales the signal by the value specified in the text field. | ADAU144x, ADAU176x, ADAU1781 | |

Adjustable Gain | Clickless SW Slew | Linear Gain (Grow No Slew) | 3 | 3 | 1 | 1 | Adds a channel of a No Slew Linear Gain algorithm to the block. | ADAU144x, ADAU176x, ADAU1781 | |

Adjustable Gain | Clickless SW Slew | Linear Gain (Grow RC Slew) | 7 | 7 | 3 | 3 | Adds a channel of an RC Slew Linear Gain algorithm to the block. | ADAU144x, ADAU176x, ADAU1781 | |

Adjustable Gain | Clickless SW Slew | Linear Gain (Grow RC Slew With Gain Output) | 9 | 9 | 4 | 3 | Adds a channel of an RC Slew With Gain Output Linear Gain algorithm to the block. | ADAU144x, ADAU176x, ADAU1781 | |

Adjustable Gain | Gain Output SW Slew | Linear Gain | 9 | 9 | 4 | 3 | Scales the signal by the value specified in the text field. | ADAU144x, ADAU176x, ADAU1781 | |

Adjustable Gain | Gain Output SW Slew | Linear Gain (Grow No Slew) | 3 | 3 | 1 | 1 | Adds a channel of a No Slew Linear Gain algorithm to the block. | ADAU144x, ADAU176x, ADAU1781 | |

Adjustable Gain | Gain Output SW Slew | Linear Gain (Grow RC Slew) | 7 | 7 | 3 | 3 | Adds a channel of an RC Slew Linear Gain algorithm to the block. | ADAU144x, ADAU176x, ADAU1781 | |

Adjustable Gain | Gain Output SW Slew | Linear Gain (Grow RC Slew With Gain Output) | 9 | 9 | 4 | 3 | Adds a channel of an RC Slew With Gain Output Linear Gain algorithm to the block. | ADAU144x, ADAU176x, ADAU1781 |

resources/tools-software/sigmastudio/toolbox/basicdspresourcetable.txt · Last modified: 25 Jul 2012 21:04 by Brett Gildersleeve