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resources:tools-software:linux-drivers:jesd204:axi_jesd204_rx [03 Jun 2019 14:27] – [Example platform device initialization] Michael Hennerichresources:tools-software:linux-drivers:jesd204:axi_jesd204_rx [08 Apr 2022 15:17] – fix link Antoniu Miclaus
Line 1: Line 1:
-====== ADI JESD204B Receive Peripheral Linux Driver ======+====== ADI JESD204B/C Receive Peripheral Linux Driver ======
  
 ===== Supported Devices ===== ===== Supported Devices =====
  
-  * [[resources:fpga:peripherals:jesd204:axi_jesd204_rx|ADI JESD204B Receive Peripheral]]+  * [[resources:fpga:peripherals:jesd204:axi_jesd204_rx|ADI JESD204B/C Receive Peripheral]]
  
 ===== Description ===== ===== Description =====
  
-The AXI JESD204B RX peripheral driver is a simple driver that supports the [[resources:fpga:peripherals:jesd204:axi_jesd204_tx|ADI JESD204B Receive Peripheral]]. The driver reads JESD204B link configuration data from the devicetree and configures the peripheral accordingly. After configuration has completed the JESD204B link is enabled. Link state can be monitored through sysfs files.+The AXI JESD204B RX peripheral driver is a simple driver that supports the [[resources:fpga:peripherals:jesd204:axi_jesd204_rx|ADI JESD204B Receive Peripheral]]. The driver reads JESD204B link configuration data from the devicetree and configures the peripheral accordingly. After configuration has completed the JESD204B link is enabled. Link state can be monitored through sysfs files.
  
 +This driver also work in conjunction with the [[resources:tools-software:linux-drivers:jesd204:jesd204-fsm-framework|JESD204 (FSM) Interface Linux Kernel Framework]], in this case JESD204B link configuration is provided by the JESD204-FSM framework. 
 ====== Source Code ====== ====== Source Code ======
  
Line 20: Line 21:
 | driver  | [[linux.github>master?drivers/iio/jesd204/axi_jesd204_rx.c | drivers/iio/jesd204/axi_jesd204_rx.c]] | | driver  | [[linux.github>master?drivers/iio/jesd204/axi_jesd204_rx.c | drivers/iio/jesd204/axi_jesd204_rx.c]] |
  
-====== Example platform device initialization ======+====== Example platform device / device tree initialization ======
  
 The AXI JESD204B driver is a platform driver and can currently only be instantiated via device tree. The AXI JESD204B driver is a platform driver and can currently only be instantiated via device tree.
  
 +===== Deprecated Non-jesd204-fsm mode =====
 + 
 Required devicetree properties: Required devicetree properties:
   * **compatible**: Must always be "adi,axi-jesd204-rx-1.00.a"   * **compatible**: Must always be "adi,axi-jesd204-rx-1.00.a"
Line 49: Line 52:
  adi,octets-per-frame = <32>;  adi,octets-per-frame = <32>;
  adi,frames-per-multiframe = <4>;  adi,frames-per-multiframe = <4>;
 + };
 +</code>
 +
 +===== jesd204-fsm mode =====
 +
 +When using the [[resources:tools-software:linux-drivers:jesd204:jesd204-fsm-framework|JESD204 (FSM) Interface Linux Kernel Framework]] the JESD link parameters are broadcasted by the framework to all link components.
 +
 +
 +Required devicetree properties:
 +  * **compatible**: Must always be "adi,axi-jesd204-rx-1.00.a"
 +  * **reg**: Base address and register area size. This parameter expects a register range.
 +  * **interrupts**: Property with a value describing the interrupt number.
 +  * **clock-names**: List of input clock names - "s_axi_aclk", "device_clk", "lane_clk"
 +  * **clocks**: Clock phandles and specifiers (See clock bindings for details on clock-names and clocks).
 +  * **jesd204-device**: Adds device to the jesd204-fsm kernel framework
 +  * **jesd204-inputs**: jesd204-fsm devices phandles and specifiers (used to build the link topology) 
 +
 +Optional devicetree clock-names:
 +  * **link_clk**: When using the link layer gearbox in order to support NP=12 modes, ''device_clk'' and ''link_clock'' need to be different. This is typical the case in case ''SYNTH_DATA_PATH_WIDTH'' and ''TPL_DATA_PATH_WIDTH'' differs. Then ''device_clk'' becomes ''link_clk'' times ''SYNTH_DATA_PATH_WIDTH'' / ''TPL_DATA_PATH_WIDTH''. ''link_clk'' still needs to be ''lane_clk'' / 40 for **JESD204B/8B10B** encoding and ''lane_clk'' / 66 for **JESD204C/64B66B** encoding.
 +  * **conv2**: Optional SERDES (CPLL/QPLL) REFCLK from a difference source which rate and state must be in sync with the main conv clk.
 +
 +
 +Example:
 +<code>
 + axi_ad9081_rx_jesd: axi-jesd204-rx@84a90000 {
 + compatible = "adi,axi-jesd204-rx-1.0";
 + reg = <0x84a90000 0x1000>;
 +
 + interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
 +
 + clocks = <&zynqmp_clk 71>, <&hmc7044 10>, <&axi_ad9081_adxcvr_rx 0>;
 + clock-names = "s_axi_aclk", "device_clk", "lane_clk";
 +
 + jesd204-device;
 + #jesd204-cells = <2>;
 + jesd204-inputs = <&axi_ad9081_adxcvr_rx 0 FRAMER_LINK0_RX>;
  };  };
 </code> </code>
Line 71: Line 110:
          [--snip--]          [--snip--]
 </code> </code>
 +
 +====== Sysfs Interface ======
 +
 +This driver provides advanced diagnostics, status and via [[wp>sysfs]]. A brief summary is with examples are provided below. 
 +
 +
 +<WRAP box bggreen><wrap info>This specifies any shell prompt running on the target</wrap>
 +<xterm>
 +root@analog:/sys/bus/platform/devices/84a90000.axi-jesd204-rx# **ls -al**
 +total 0
 +drwxr-xr-x  4 root root    0 Feb  6 13:41 .
 +drwxr-xr-x 12 root root    0 Feb  6 13:41 ..
 +lrwxrwxrwx  1 root root    0 Feb  6 13:41 driver -> ../../../../bus/platform/drivers/axi-jesd204-rx
 +-rw-r--r--  1 root root 4096 Feb  6 16:27 driver_override
 +-r--r--r--  1 root root 4096 Feb  6 16:27 encoder
 +drwxr-xr-x  3 root root    0 Feb  6 13:41 jesd204:4
 +-r--------  1 root root 4096 Feb  6 16:27 lane0_info
 +-r--------  1 root root 4096 Feb  6 16:27 lane1_info
 +-r--------  1 root root 4096 Feb  6 16:27 lane2_info
 +-r--------  1 root root 4096 Feb  6 16:27 lane3_info
 +-r--------  1 root root 4096 Feb  6 16:27 lane4_info
 +-r--------  1 root root 4096 Feb  6 16:27 lane5_info
 +-r--------  1 root root 4096 Feb  6 16:27 lane6_info
 +-r--------  1 root root 4096 Feb  6 16:27 lane7_info
 +-r--r--r--  1 root root 4096 Feb  6 16:27 modalias
 +lrwxrwxrwx  1 root root    0 Feb  6 16:27 of_node -> ../../../../firmware/devicetree/base/fpga-axi@0/axi-jesd204-rx@84a90000
 +drwxr-xr-x  2 root root    0 Feb  6 16:27 power
 +-r--r--r--  1 root root 4096 Feb  6 16:27 status
 +lrwxrwxrwx  1 root root    0 Feb  6 13:41 subsystem -> ../../../../bus/platform
 +-rw-r--r--  1 root root 4096 Feb  6 13:41 uevent
 +</xterm></WRAP>
 +
 +**Reading the device/link status:**
 +
 +<WRAP box bggreen><wrap info>This specifies any shell prompt running on the target</wrap>
 +<xterm>
 +root@analog:/sys/bus/platform/devices/84a90000.axi-jesd204-rx# **cat status**
 +Link is enabled
 +Measured Link Clock: 375.034 MHz
 +Reported Link Clock: 375.000 MHz
 +Measured Device Clock: 375.034 MHz
 +Reported Device Clock: 375.000 MHz
 +Desired Device Clock: 375.000 MHz
 +Lane rate: 15000.000 MHz
 +Lane rate / 40: 375.000 MHz
 +LMFC rate: 46.875 MHz
 +Link status: DATA
 +SYSREF captured: Yes
 +SYSREF alignment error: No
 +</xterm></WRAP>
 +
 +**Reading the Encoder used:**
 +
 +<WRAP box bggreen><wrap info>This specifies any shell prompt running on the target</wrap>
 +<xterm>
 +root@analog:/sys/bus/platform/devices/84a90000.axi-jesd204-rx# **cat encoder** 
 +8b10b
 +</xterm></WRAP>
 +
 +**Reading the Lane Status:**
 +
 +<WRAP box bggreen><wrap info>This specifies any shell prompt running on the target</wrap>
 +<xterm>
 +root@analog:/sys/bus/platform/devices/84a90000.axi-jesd204-rx# **cat lane0_info** 
 +Errors: 0
 +CGS state: DATA
 +Initial Frame Synchronization: Yes
 +Lane Latency: 3 Multi-frames and 13 Octets
 +Initial Lane Alignment Sequence: Yes
 +DID: 0, BID: 0, LID: 2, L: 8, SCR: 1, F: 1
 +K: 32, M: 4, N: 16, CS: 0, N': 16, S: 1, HD: 0
 +FCHK: 0x9, CF: 0
 +ADJCNT: 0, PHADJ: 0, ADJDIR: 0, JESDV: 1, SUBCLASS: 1
 +FC: 15000000
 +</xterm></WRAP>
  
 ===== More Information ===== ===== More Information =====
  
   * [[resources:fpga:peripherals:jesd204|JESD204B High-Speed Serial Interface Support]]   * [[resources:fpga:peripherals:jesd204|JESD204B High-Speed Serial Interface Support]]
resources/tools-software/linux-drivers/jesd204/axi_jesd204_rx.txt · Last modified: 15 Nov 2023 11:39 by Michael Hennerich

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