| Both sides previous revisionPrevious revisionNext revision | Previous revision |
| resources:tools-software:linux-drivers:iio-transceiver:adrv9002-customization [24 Jun 2020 18:20] – Nuno Sá | resources:tools-software:linux-drivers:iio-transceiver:adrv9002-customization [07 Jan 2021 20:24] (current) – Add examples of split and mimo devtrees Travis Collins |
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| If unsure please see the manual or don't change! | If unsure please see the manual or don't change! |
| </WRAP> | </WRAP> |
| | |
| | ====== RX and TX Channels ====== |
| | |
| | ADRV9002 can operate different RX and TX channels at different rates due to the flexibility of the hardware. Making it possible to run four channels (TX1,TX2,RX1,RX2) all at different rates. However, this will require a specific configuration in devicetree to make this possible. |
| | |
| | The two main categories are combined DMA mode, which we refer to as MIMO mode, and a split DMA mode. In the first case, a single DMA driver is instantiated with up to four channels (two complex) per data direction. This allows for synchronous capture between RX1 and RX2 or transmission with TX1 and TX2. Alternatively, in split mode two drivers per direction will be instantiated. This is typically used when different rates are needed between channels and data transfers between channels are not required to by synchronous. |
| | |
| | For examples of these arrangements, look at the following devicetrees: |
| | * [[linux.github>e2d92f9152d49473a887aad70486855e5843faa5/arch/arm64/boot/dts/xilinx|MIMO (combined) mode]] |
| | * [[linux.github>e2d92f9152d49473a887aad70486855e5843faa5/arch/arm64/boot/dts/xilinx|Split mode]] |
| |
| ====== RX ====== | ====== RX ====== |
| | adi,sync-pulse-gain-counter-en | 0 | Enable the AGC gain update counter to be sync'ed to a time-slot boundary. | | | adi,sync-pulse-gain-counter-en | 0 | Enable the AGC gain update counter to be sync'ed to a time-slot boundary. | |
| | adi,fast-recovery-loop-en | 0 | Enable multiple time constants in AGC loop for fast attack and fast recovery. | | | adi,fast-recovery-loop-en | 0 | Enable multiple time constants in AGC loop for fast attack and fast recovery. | |
| | adi,power-measurement-en | 1 | Enable the Rx power measurement block | | | adi,no-power-measurement-en | 1 | Disable the Rx power measurement block | |
| | adi,power-under-range-high-threshold | 4 | Threshold which defines the lower boundary on the stable region of the power detect gain control mode. Valid Range from 0 to 127. | | | adi,power-under-range-high-threshold | 4 | Threshold which defines the lower boundary on the stable region of the power detect gain control mode. Valid Range from 0 to 127. | |
| | adi,power-under-range-low-threshold | 0 | Offset from adi,power-under-range-high-threshold which defines the outer boundary of the power based AGC convergence. Valid offset from 0 to 15 | | | adi,power-under-range-low-threshold | 0 | Offset from adi,power-under-range-high-threshold which defines the outer boundary of the power based AGC convergence. Valid offset from 0 to 15 | |
| | adi,peak-apd-gain-step-attack | 4 | AGC APD peak detect attack gain step. Valid range is 0 to 31. | | | adi,peak-apd-gain-step-attack | 4 | AGC APD peak detect attack gain step. Valid range is 0 to 31. | |
| | adi,peak-apd-gain-step-recovery | 0 | AGC APD gain index step size for recovery. Valid range is 0 to 31. | | | adi,peak-apd-gain-step-recovery | 0 | AGC APD gain index step size for recovery. Valid range is 0 to 31. | |
| | adi,peak-hb-overload-en | 1 | Enable or disables the HB overload detector. | | | adi,no-peak-hb-overload-en | 1 | Disable the HB overload detector. | |
| | adi,peak-hb-overload-duration-count | 1 | Sets the window of clock cycles (at the HB output rate) to meet the overload count. (0 = 2 cycles, 1 = 4 cycles, 2 = 8 cycles, 3 = 12 cycles, 4 = 16 cycles, 5 = 24 cycles, 6 = 32 cycles). | | | adi,peak-hb-overload-duration-count | 1 | Sets the window of clock cycles (at the HB output rate) to meet the overload count. (0 = 2 cycles, 1 = 4 cycles, 2 = 8 cycles, 3 = 12 cycles, 4 = 16 cycles, 5 = 24 cycles, 6 = 32 cycles). | |
| | adi,peak-hb-overload-threshold-count | 1 | Sets the number of actual overloads required to trigger the overload signal. Valid range from 1 to 15. | | | adi,peak-hb-overload-threshold-count | 1 | Sets the number of actual overloads required to trigger the overload signal. Valid range from 1 to 15. | |
