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resources:tools-software:linux-drivers:iio-pll:ad9528 [19 Jan 2018 10:16] – rename xcomm_zynq -> master Alexandru Ardelean | resources:tools-software:linux-drivers:iio-pll:ad9528 [24 May 2019 10:29] – [Available properties] Michael Hennerich | ||
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The AD9528 generates two outputs (Output 1 and Output 2) with a maximum frequency of 1.25 GHz, and 12 outputs up to | The AD9528 generates two outputs (Output 1 and Output 2) with a maximum frequency of 1.25 GHz, and 12 outputs up to | ||
1 GHz. Each output can be configured to output directly from PLL1, PLL2, or the internal SYSREF generator. Each of the 14 output channels contains a divider with coarse digital phase adjustment and an analog fine phase delay block that allows complete flexibility in timing alignment across all 14 outputs. | 1 GHz. Each output can be configured to output directly from PLL1, PLL2, or the internal SYSREF generator. Each of the 14 output channels contains a divider with coarse digital phase adjustment and an analog fine phase delay block that allows complete flexibility in timing alignment across all 14 outputs. | ||
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+ | Please see also here: [[resources: | ||
{{ : | {{ : | ||
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* **adi, | * **adi, | ||
* **adi, | * **adi, | ||
- | * **adi,pll2-ndiv-a-cnt**: PLL2 Feedback N divider, counter A (range 0..4) | + | * **adi,pll2-m1-frequency**: Distribution clock frequency |
- | * **adi,pll2-ndiv-b-cnt**: PLL2 Feedback N divider, counter B (range 0..63) | + | |
* **adi, | * **adi, | ||
* **adi, | * **adi, |