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resources:tools-software:linux-drivers:iio-dds:axi-dac-dds-hdl [12 Apr 2019 11:38] – [Description] Michael Hennerichresources:tools-software:linux-drivers:iio-dds:axi-dac-dds-hdl [22 Nov 2023 10:08] (current) – Add support for AD9783 iulia Moldovan
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 ===== Supported Devices ===== ===== Supported Devices =====
   * [[adi>AD9122]]   * [[adi>AD9122]]
 +  * [[adi>AD9136]]               
   * [[adi>AD9144]]                  * [[adi>AD9144]]               
   * [[adi>AD9152]]   * [[adi>AD9152]]
 +  * [[adi>AD9154]]
   * [[adi>AD9162]]   * [[adi>AD9162]]
   * [[adi>AD9171]]   * [[adi>AD9171]]
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   * [[adi>AD9371]]   * [[adi>AD9371]]
   * [[adi>AD9739A]]      * [[adi>AD9739A]]   
-   +  * [[adi>AD9783]] 
    
-===== Supported Boards =====                                                                                                                                                                  +===== Supported Boards ===== 
 This driver supports the\\                                                                                                                                                                     This driver supports the\\                                                                                                                                                                    
   * [[resources/eval/user-guides/ad-fmcomms1-ebz |AD-FMCOMMS1-EBZ FMC Card]]                                                                                                                     * [[resources/eval/user-guides/ad-fmcomms1-ebz |AD-FMCOMMS1-EBZ FMC Card]]                                                                                                                  
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   * [[resources/fpga/xilinx/fmc/ad9739a | AD9739A Native FMC Card / Xilinx Reference Designs]]   * [[resources/fpga/xilinx/fmc/ad9739a | AD9739A Native FMC Card / Xilinx Reference Designs]]
   * [[resources/fpga/xilinx/interposer/ad9739a | AD9739A Evaluation Board, DAC-FMC Interposer & Xilinx Reference Design]]   * [[resources/fpga/xilinx/interposer/ad9739a | AD9739A Evaluation Board, DAC-FMC Interposer & Xilinx Reference Design]]
 +  * [[:resources:eval:dpg:eval-ad9783 | EVALUATING THE AD9780/AD9781/AD9783 DIGITAL-TO-ANALOG CONVERTERS]]
 +  * [[:resources:fpga:xilinx:interposer:ad9783 | AD9783 Evaluation Board, DAC-FMC Interposer & Xilinx Reference Design]]
   * [[resources/eval/user-guides/mykonos | ADRV9371 FMC Card]]   * [[resources/eval/user-guides/mykonos | ADRV9371 FMC Card]]
   * [[resources:eval:user-guides:adrv9009|ADRV9009 & ADRV9008 Prototyping Platform User Guide]]   * [[resources:eval:user-guides:adrv9009|ADRV9009 & ADRV9008 Prototyping Platform User Guide]]
   * [[resources:eval:dpg:eval-ad9172|AD9171/AD9172/AD9173/AD9174/AD9175/AD9176 Evaluation Board]]   * [[resources:eval:dpg:eval-ad9172|AD9171/AD9172/AD9173/AD9174/AD9175/AD9176 Evaluation Board]]
  
 +===== Supported HDL Cores =====  
 +
 +  * [[resources:fpga:docs:axi_dac_ip|Generic AXI DAC]]
 +  * [[resources:fpga:peripherals:jesd204:jesd204_tpl_dac|DAC JESD204B Transport Peripheral]]
 +  * [[resources:fpga:docs:axi_ad9144|AXI_AD9144]]
 +  * [[resources:fpga:docs:axi_ad9361|AXI_AD9361]]
 +  * [[resources:fpga:docs:axi_ad9371|AXI_AD9371]]
 +  * [[:resources:fpga:docs:axi_ad9783|AXI_AD9783]]
 +
 +===== Sub device Documentation (linked mode) =====
 +
 +  * [[resources:tools-software:linux-drivers:iio-dds:ad9172|AD9172 DAC Linux Driver]]
 ===== Description ===== ===== Description =====
  
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 Alternatively this driver can also be used in a ''linked mode'', where the converter device typically a SPI device must instantiate first. If this has happened this AXI-DAC driver will then probe as well. (Deferred probe mechanism)  Alternatively this driver can also be used in a ''linked mode'', where the converter device typically a SPI device must instantiate first. If this has happened this AXI-DAC driver will then probe as well. (Deferred probe mechanism) 
 Finally both the HDL core platform device together with the converter SPI device will register a common IIO device, which will then exhibit a common set of attributes and channels. Finally both the HDL core platform device together with the converter SPI device will register a common IIO device, which will then exhibit a common set of attributes and channels.
-The converter SPI device driver is handled in a separate source file, which can be found in the same directory this driver exists.+The converter SPI device driver is handled in a separate source file, which can be found in the same directory this driver exists. The device tree phandle “spibus-connected” is used to connect the AXI-DAC driver with the SPI control driver. 
  
 Sometimes there is a common HDL/FPGA transport layer core, which handles both RX/TX or ADC/DMA. Sometimes there is a common HDL/FPGA transport layer core, which handles both RX/TX or ADC/DMA.
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   * **compatible**: Should always be one of these:   * **compatible**: Should always be one of these:
     * adi,axi-ad9122-6.00.a     * adi,axi-ad9122-6.00.a
 +    * adi,axi-ad9136-1.0
     * adi,axi-ad9144-1.0     * adi,axi-ad9144-1.0
     * adi,axi-ad9162-1.0     * adi,axi-ad9162-1.0
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     * adi,axi-ad9739a-8.00.b     * adi,axi-ad9739a-8.00.b
     * adi,axi-ad9963-dds-1.00.a     * adi,axi-ad9963-dds-1.00.a
 +    * adi,axi-adrv9009-tx-1.0
  
   * **reg**: Base address and register area size. This parameter expects a register range.   * **reg**: Base address and register area size. This parameter expects a register range.
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 </xterm></WRAP> </xterm></WRAP>
 +
 +=== External synchronization ===
 +
 +The [[resources:fpga:peripherals:jesd204:jesd204_tpl_dac|DAC TPL HDL]] core supports the [[resources:fpga:peripherals:jesd204:jesd204_tpl_dac#External_synchronization|EXT_SYNC]] feature, allowing to synchronize multiple channels within a DAC or across multiple instances.
 +This feature can also synchronize between the [[resources:fpga:peripherals:jesd204:jesd204_tpl_adc|ADC TPL HDL]] and [[resources:fpga:peripherals:jesd204:jesd204_tpl_dac|DAC TPL HDL]] core. 
 +
 +There are two device attributes which allows controlling this feature:
 +''sync_start_enable'' and ''sync_start_enable_available'' reading the
 +later returns the available modes which depend on HDL core synthesis
 +parameters. The options are explained below. Reading 'sync_start_enable'
 +returns either 'arm' while waiting for the external synchronization
 +signal or 'disarm' otherwise.
 +
 +  * ''arm'': Setting this key will arm the trigger mechanism sensitive to an external sync signal. Once the external sync signal goes high it synchronizes channels within a DAC, and across multiple instances. This key has an effect only the EXT_SYNC synthesis parameter is set. 
 +
 +  * ''disarm'': Setting this key will disarm the trigger mechanism sensitive to an external sync signal. This key has an effect only the EXT_SYNC synthesis parameter is set.
 +
 +  * ''trigger_manual'': Setting this key will issue an external sync event if it is hooked up inside the fabric. This key has an effect only the EXT_SYNC synthesis parameter is set.
 +        
 +== Example: ==
 +
 +<WRAP box bggreen><wrap info>This specifies any shell prompt running on the target</wrap>
 +<xterm>
 +root@analog:/sys/bus/iio/devices/iio:device3# **cat sync_start_enable_available**                                                                                                                       
 +**arm disarm trigger_manual**
 +root@analog:/sys/bus/iio/devices/iio:device3# **cat sync_start_enable**
 +**disarm**
 +root@analog:/sys/bus/iio/devices/iio:device3# **echo arm > sync_start_enable**                                                                                                                                 
 +root@analog:/sys/bus/iio/devices/iio:device3# **cat sync_start_enable**
 +**arm**
 +root@analog:/sys/bus/iio/devices/iio:device3# **echo trigger_manual > sync_start_enable**                                                                                                                      
 +root@analog:/sys/bus/iio/devices/iio:device3# **cat sync_start_enable**
 +**disarm**
 +</xterm></WRAP>
 +
 +
 ===== Buffer management ===== ===== Buffer management =====
  
resources/tools-software/linux-drivers/iio-dds/axi-dac-dds-hdl.1555061926.txt.gz · Last modified: 12 Apr 2019 11:38 by Michael Hennerich

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