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This version (08 Jan 2024 12:54) was approved by Jagannath Rotti, agnes monica.The Previously approved version (22 Nov 2023 16:43) is available.Diff

Setting up the A2B Analyzer (as main node) for optoA2B

The procedure to use optoA2B with A2B Bus Analyzer is as follows:

This section will guide the user to configure an OptoA2B branch network using ADI’s A2B Bus Analyzer as main node in the following configuration:

A2B Analyzer ←→ Opto A2B Sub←→ Opto A2B Main ←→ A2B Sub node DUT

SI No. Software Component Version Comments
1. SigmaStudio+ 2.1.0 or later SS+ Guide
2. A2B 1.3.1 or later User Guide
3. A2B Bus Analyzer 3.4 or later Quick Start Guide
Please contact A2B SW and A2B Analyzer support teams for latest updates

Example Project

A2B Analyzer ←→ Opto A2B Sub ←→ Opto A2B Main ←→ A2B Sub node DUT

Project file: <Installation Path>\ADI_A2B-SSPlus_Software-Relx.y.z\Schematics\A2BBusAnalyzer\adi_a2bbusanalyzer_243xStdPwrMain_242xOptoA2B.ssproj

Hardware Requirements

Sl. No Name of Board Type of Board/ Node Quantity
1 A2B Bus Analyzer kit Emulated as Main node 1
2 Twisted Pair A2B Cable DuraClik connector on one end to Analyzer and Rosenberger HSD connector on one end to OptoA2B Main 1
3 12V Power Supply - 2
4 USB cable from PC to A2B Bus Analyzer - 1
5 Audio source (non-grounded) ­­­­­e.g., PC/Mobile phone 1
6 Aux Cable - 1
7 Audio Sink Devices 3.5mm Jack Headphones 1
8 AD2428WD1BZ (for emulating optoA2B only) Primary chain-sub, Branch Main, Branch Sub - NOT required when actual optoA2B is available 3

System Block Diagram

AD2428WD1BZ boards are used to emulate optoA2B sub and branch-main in the above figure.

OptoA2B Setup

OptoA2B main and DUT are present inside the EMC chamber while A2B Bus Analyzer and optoA2B sub are outside the chamber.

A2B Analyzer Settings

A2B Analyzer to be kept in Standard power Emulator mode.

Procedure

Procedure to run a Branch Network (Opto A2B) from ADI A2B Analyzer:

  • In SigmaStudio+, create a schematic with the A2BBusAnalyzer platform as the main node Emulator and the OptoA2B platform as a sub node, and connect a Device under test as a sub node for the optoA2B branching chain. Schematic should be designed to have upstream audio from branch to A2B analyzer main.
    • Drag an analyzer platform from the toolbox and change into main node.
    • Drag a OptoA2B platform from Toolbox.
    • Drag a A2B sub node as DUT & connect to branching chain and save the project.
  • One-click procedure: Press Link-Compile-Download button in SigmaStudio+. SigmaStudio+ will launch the A2B Bus Analyzer automatically and discover the primary chain via .Dat file and secondary chain via command list.
  • The audio streams from the DUT are now available on the main emulator for analysis and logging.
Post Discovery Branching chain register/peripheral read/write is not supported.
Once the primary chain is discovered, each secondary chain commands are taken as individual branch transactions with its own CHIP, NODEADR and PERI transactions as show below.

APPENDIX

Jumper Settings

Opto A2B Sub to Opto A2B main (in the current example AD2428WD1BZ is used for Opto Sub and Opto main)

JumperOpto Sub to Opto Main
JP5 (BCLK) 3 → 3
JP6 (SYNC) 3 → 3
DRX0 - DTX0 3(JP7) → 2(JP10)
DRX1 - DTX1 2(JP8) → 3(JP9)
DTX0 - DRX0 2(JP10) → 3(JP7)
DTX1 - DRX1 3(JP9) → 2(JP8)
P1(SCL) 1 → 1
P1(SDA) 3 → 3
P1(GND) 10 → 10

A2B Sub node DUT (in the current example – AD2428WD1BZ is used as Sub node DUT)

Jumper LPS Comments
JP1 (A2B power) Install -
JP2 Uninstall Install when phantom power or hybrid power support is required
JP3 Uninstall Install when phantom power or hybrid power support is required
JP4 (BOOT) Install Self-Boot option disabled.
JP5 (BCLK) 1-3 AD2428_BCLK → ADAU1961_BCLK
JP6 (SYNC) 1-3 AD2428_SYNC → ADAU1961_LRCLK
JP7 (DRX0) 1-3 ADAU1961_ADC → AD2428_DRX0
JP8 (DRX1) Uninstall -
JP9 (DTX1) Uninstall -
JP10 (DTX0) 2-3 AD2428_DTX0 → ADAU1961_DAC
JP11 (ADMP621 CLK) Uninstall -
JP12 (NTC) Install -
JP13 (A2B_REG) Uninstall -
JP14 (VOLTAGE) Uninstall Install/ Uninstall depending on VIN requirement. Installed → VIN = 7V, Uninstalled → VIN = 8V
JP19 (1961 BCLK) 2-3 ADAU1761 MCLK from AD2428_BCLK
resources/tools-software/a2b-bus-analyzer/a2ba_opto.txt · Last modified: 03 Jan 2024 08:18 by Gireesha Nirvanaiah