Differences

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--- resources:fpga:xilinx:pmod:adp5589 [12 Mar 2012 09:40] – Changed PMOD- to Pmod Alexandru Tofan
+++ resources:fpga:xilinx:pmod:adp5589 [09 Jan 2021 00:57] (current) – user interwiki links Robin Getz
@@ Line 1: / Line 1: @@
-====== ADP5589 Xilinx Pmod FPGA Reference Design ======
+====== ADP5589 Pmod Xilinx FPGA Reference Design ======
 ===== Introduction =====
@@ Line 7: / Line 7: @@
 **HW Platform(s):**
-  * [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]
+   * [[xilinx>products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]
-  * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,401,960&Prod=PMOD-IOXP|PmodIOXP ADP5589 (Digilent)]]
+   * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]
-  * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,401,940&Prod=PMODKYPD|PmodKYPD (Digilent)]] \\
+   * [[http://www.em.avnet.com/en-us/design/drc/Pages/Zedboard.aspx|Avnet ZedBoard]] \\
-**System:** Microblaze, AXI, UART \\
 ===== Quick Start Guide =====
@@ Line 17: / Line 16: @@
 ==== Required Hardware ====
-  * LX9 microboard
+  * [[xilinx>products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]
-  * PmodIOXP ADP5589 card and PmodKYPD
+  * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]
+  * [[http://www.em.avnet.com/en-us/design/drc/Pages/Zedboard.aspx|Avnet ZedBoard]] \\
+  * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,401,960&Prod=PMOD-IOXP|PmodIOXP ADP5589 (Digilent)]]
+  * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,401,940&Prod=PMODKYPD|PmodKYPD (Digilent)]]
 ==== Required Software ====
-  * Xilinx ISE 13.2 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).
+  * Xilinx ISE 14.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).
-  * A UART terminal (Tera Term/Hyperterminal), Baud rate 115200.
+  * A UART terminal (Tera Term/Hyperterminal), Baud rate 115200 for the Avnet LX-9 Microboard and ZedBoard or 9600 for the Digilent Nexys™3 Board.
 ==== Running Demo (SDK) Program ====
-<note tip>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm]] for details.
+<WRAP center round tip 80%>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[xilinx>products/boards-and-kits/AES-S6MB-LX9.htm]] for details.\\
-</note>
+If you are not familiar with Nexys™3 and/or Xilix tools, please visit\\ [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3]] for details.\\
+If you are not familiar with ZedBoard and/or Xilix tools, please visit\\ [[http://www.em.avnet.com/en-us/design/drc/Pages/Zedboard.aspx]] for details.</WRAP>
-Extract the project from the archive file (ADP5589.zip) to the location you desire.
+==== Avnet LX9 MicroBoard Setup ====
-To begin, connect the PmodKYPD to J1 connector of PmodIOXP. After that, connect the PmodIOXP board to J4 connector of LX9 board, pins 3 to 6 (see image below). You must use the extension cable provided, otherwise the I2C Interface will not work. Connect the USB cables from the PC to the board.
+Extract the project from the archive file (ADP5589_<board_name>.zip) to the location you desire.
+To begin, connect the PmodKYPD to J1 connector of PmodIOXP. After that, connect the PmodIOXP board to J4 connector of LX9 board, pins 3 to 6 (see image below). You must use the extension cable provided, otherwise the I2C Interface will not work. . Connect the USB cable from the PC to the USB-UART female connector of the board for the UART terminal. The board will be programmed through its USB male connector.
 {{:resources:fpga:xilinx:pmod:pmodkypd_pmodioxp.jpg?200|Connect PmodKYPD to PmodIOXP}}
 {{:resources:fpga:xilinx:pmod:pmodioxp_lx9.jpg?200|Connect PmodIOXP to LX-9}}
-Start IMPACT, and double click "Boundary Scan". Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal (set to 115200 baud rate) and then program the device using the bit file provided in the project *.zip archive, located in the “sw” folder (../adp5589/sw/ADP5589.bit).
+==== Digilent Nexys™3 Spartan-6 FPGA Board ====
-{{:resources:fpga:xilinx:pmod:adp5589_impact.jpg?200|}}
+Extract the project from the archive file (ADP5589_<board_name>.zip) to the location you desire.
+To begin, connect the PmodKYPD to J1 connector of PmodIOXP. After that, connect the PmodIOXP board to JA connector of Nexys™3 board, pins JA3 to JA6 (see image below). You must use the extension cable provided, otherwise the I2C Interface will not work. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART).
+{{:resources:fpga:xilinx:pmod:pmodkypd_pmodioxp.jpg?200|Connect PmodKYPD to PmodIOXP}}
+{{:resources:fpga:xilinx:pmod:pmodioxp_nexys3.jpg?200|Connect PmodIOXP to Nexys™3}}
+==== Avnet ZedBoard ====
+To begin, connect the PmodIOXP to JC1 connector of ZedBoard (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART).
+{{:resources:fpga:xilinx:pmod:pmodioxp_zed.jpg?400|PmodIOXP and ZedBoard}}
+==== FPGA Configuration for Nexys3 and LX-9 MicroBoard ====
+Start IMPACT, and double click "Boundary Scan". Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal (set appropiate baud rate) and then program the device using the bit file provided in the project *.zip archive, located in the “sw” folder (../adp5589/sw/ADP5589.bit).
+{{:resources:fpga:xilinx:pmod:adp5589_impact.jpg?300|}}
+==== FPGA Configuration for ZedBoard ====
+Run the **download.bat** script from the "../bin" folder downloaded from the github (see the links in the download section of the wiki page).
+The script will automatically configure the ZYNQ SoC and download the *.elf file afterwards.
+<WRAP center round tip 80%>
+If the download script fails to run, modify the Xilinx Tools path in **download.bat** to match your Xilinx Installation path.
+</WRAP>
 If programming was successful, you should be seeing messages appear on the terminal window as shown in figures below. After programming the ADP5589 device, the program will display initialization messages, and afterwards it will enter Key Decoder Test Mode. In this mode, you can press any key on the PmodKYPD, and it will be displayed on the UART along with the corresponding event (press/release). Pressing the [F] key will exit Key Decoder Test Mode. Next the program will Lock the keypad. Unlocking it requires the combination [1] [A].
-{{:resources:fpga:xilinx:pmod:tera1.jpg?200|Initialization}}
+{{:resources:fpga:xilinx:pmod:PmodIOXP_menu1.jpg?400|Initialization}}
-{{:resources:fpga:xilinx:pmod:tera2.jpg?200|Key Decode Test}}
+{{:resources:fpga:xilinx:pmod:PmodIOXP_menu2.jpg?400|Key Decode Test}}
-{{:resources:fpga:xilinx:pmod:tera3.jpg?200|Key Lock/Unlock}}
+{{:resources:fpga:xilinx:pmod:PmodIOXP_menu3.jpg?400|Key Lock/Unlock}}
 ===== Using the reference design =====
@@ Line 56: / Line 87: @@
 The hardware I2C access allows reading or writing of any ADP5589 registers via the address, write and read data registers.
-<note important>PmodIOXP must be connected to J4 using the extension cable provided. \\
+<WRAP round 80% important>PmodIOXP must be connected to J4 using the extension cable provided. \\
 When decoding the PmodKYPD pay attention to the fact that: \\
   * ROW1 to ROW4 are seen by the ADP5589 as C3 to C0. \\
   * COL4 to COL1 are seen by the ADP5589 as R3 to R0. \\
-UART must be set to 115200 baudrate. \\
+UART must be set to 115200 Baud Rate for the Avnet LX-9 Microboard and ZedBoard or 9600 Baud Rate for the Digilent Nexys™3 Board. \\
-</note>
+</WRAP>
+<WRAP round important 80%>
+When using the ZedBoard reference design in order to develop your own software, please make sure that the following options are set in "system_config.h":
+<code c>
+// Select between PS7 or AXI Interface
+#define USE_PS7 	 1
+// SPI used in the design
+#define USE_SPI		 0
+// I2C used in the design
+#define USE_I2C		 1
+// Timer (+interrupts) used in the design
+#define USE_TIMER	 0
+// External interrupts used in the design
+#define USE_EXTERNAL     0
+// GPIO used in the design
+#define USE_GPIO         0
+</code>
+</WRAP>
 ===== Downloads =====
-{{:resources:fpga:xilinx:pmod:adp5589.zip|Reference design source code}}
+<WRAP round download 80%>
+\\
+**Avnet LX-9 MicroBoard: **\\
+    * {{:resources:fpga:xilinx:pmod:adp5589_lx9.zip|Reference design source code for Avnet LX9 MicroBoard.}}\\
-===== More information =====
+**Digilent Nexys™3:**\\
-  * [[ez>community/fpga|ask questions about the FPGA reference design]]
+    * {{:resources:fpga:xilinx:pmod:adp5589_nexys3.zip|Reference design source code for Digilent Nexys™3 Spartan-6 FPGA Board.}}\\
+**Avnet ZedBoard:**\\
+    * [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_adv7511_zed|XPS Project]]\\
+    * [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodIOXP|PmodIOXP Driver Files]]\\
+    * [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/Common/sw|ZYNQ SoC Peripherals Driver Files]] \\
+    * [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodIOXP/bin|Programming Script]]\\
+</WRAP>
+===== More information =====
+  * [[ez>community/fpga|ask questions about the FPGA reference design]]
+  * Example questions: {{rss>http://ez.analog.com/community/feeds/allcontent/atom?community=2061 5 author 1d}}

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