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resources:fpga:xilinx:pmod:ad7980 [25 May 2012 12:46] – [More information] Andrei Cozmaresources:fpga:xilinx:pmod:ad7980 [09 Jan 2021 00:49] (current) – user interwiki links Robin Getz
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 The [[adi>AD7980]] is a 16-bit, successive approximation, analog-to-digital converter (ADC) that operates from a single power supply, VDD.It contains a low power, high speed, 16-bit sampling ADC and a versatile serial interface port. On the CNV rising edge, it samples an analog input IN+ between 0V to REF with respect to ground sense IN-. The reference voltage, REF, is applied externally and can be set independent of the supply voltage, VDD. Its power scales linearely with throughput. The [[adi>AD7980]] is a 16-bit, successive approximation, analog-to-digital converter (ADC) that operates from a single power supply, VDD.It contains a low power, high speed, 16-bit sampling ADC and a versatile serial interface port. On the CNV rising edge, it samples an analog input IN+ between 0V to REF with respect to ground sense IN-. The reference voltage, REF, is applied externally and can be set independent of the supply voltage, VDD. Its power scales linearely with throughput.
  
-**HW Platform(s):** [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]] [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-AD4|PmodAD4 (Digilent)]] \\ +**HW Platform(s):**  
-**System:** Microblaze, AXI, UART \\+   * [[xilinx>products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]  
 +   [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]] 
 +   [[http://www.em.avnet.com/en-us/design/drc/Pages/Zedboard.aspx|Avnet ZedBoard]] \\ 
 ===== Quick Start Guide ===== ===== Quick Start Guide =====
  
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 ==== Required Hardware ==== ==== Required Hardware ====
-  * [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]] +  * [[xilinx>products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]] 
 +  * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]   
 +  * [[http://www.em.avnet.com/en-us/design/drc/Pages/Zedboard.aspx|Avnet ZedBoard]]  
   * [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-AD4|PmodAD4 (Digilent)]]   * [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-AD4|PmodAD4 (Digilent)]]
  
 ==== Required Software ==== ==== Required Software ====
-  * Xilinx ISE 13.(Programmer (IMPACT) is sufficient for the demo and is available on Webpack). +  * Xilinx ISE 14.(Programmer (IMPACT) is sufficient for the demo and is available on Webpack). 
-  * A UART terminal (Tera Term/Hyperterminal), Baud rate 57600. +  * A UART terminal (Tera Term/Hyperterminal), Baud rate 115200 for the Avnet LX-9 Microboard and ZedBoard or 9600 for the Digilent Nexys™3 Board.
  
 ==== Running Demo (SDK) Program ==== ==== Running Demo (SDK) Program ====
  
-<note tip>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm]] for details. +<WRAP center round tip 80%>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[xilinx>products/boards-and-kits/AES-S6MB-LX9.htm]] for details.\\ 
-</note> +If you are not familiar with Nexys™3 and/or Xilix tools, please visit\\ [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3]] for details.\\ 
-Extract the project from the archive file (AD7980.zip) to the location you desire+If you are not familiar with ZedBoard and/or Xilix tools, please visit\\ [[http://www.em.avnet.com/en-us/design/drc/Pages/Zedboard.aspx]] for details.</WRAP>
  
-To begin, connect the PmodAD4 to J5 connector of LX9 board, pins 1 to 6 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board.+==== Avnet LX9 MicroBoard Setup ==== 
 + 
 +Extract the project from the archive file (AD7980_<board_name>.zip) to the location you desire.  
 + 
 +To begin, connect the PmodAD4 to J5 connector of LX9 board, pins 1 to 6 (see image below). You can use an extension cable for ease of use. Connect the USB cable from the PC to the USB-UART female connector of the board for the UART terminal. The board will be programmed through its USB male connector.
  
 {{:resources:fpga:xilinx:pmod:pmodad4.jpg?200|PmodAD4 and LX-9}} {{:resources:fpga:xilinx:pmod:pmodad4.jpg?200|PmodAD4 and LX-9}}
  
-Start IMPACT, and double click "Boundary Scan". Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal (set to 57600 baud rate) and then program the device using the bit file provided in the project *.zip archive, located in the "sw" folder (../ad7980/sw/AD7980.bit).+==== Digilent Nexys™3 Spartan-6 FPGA Board ==== 
 + 
 +Extract the project from the archive file (AD7980_<board_name>.zip) to the location you desire.  
 + 
 +To begin, connect the PmodAD4 to JA connector of Nexys3 board, pins JA1 to JA6 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART). 
 + 
 +{{:resources:fpga:xilinx:pmod:pmodad4_nexys3.jpg?200|PmodAD4 and Nexys™3}} 
 + 
 +==== Avnet ZedBoard ==== 
 + 
 +To begin, connect the PmodAD4 to JD connector of ZedBoard (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART). 
 + 
 +{{:resources:fpga:xilinx:pmod:pmodad4_zed.jpg?200|PmodAD4 and ZedBoard}} 
 + 
 +==== FPGA Configuration for Nexys3 and LX-9 MicroBoard ==== 
 + 
 +Start IMPACT, and double click "Boundary Scan". Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal (set to appropiate baud rate) and then program the device using the bit file provided in the project *.zip archive, located in the "sw" folder (../ad7980/sw/AD7980.bit).
  
 {{:resources:fpga:xilinx:pmod:PmodAD4Impact.jpg?200|Programming FPGA in IMPACT}} {{:resources:fpga:xilinx:pmod:PmodAD4Impact.jpg?200|Programming FPGA in IMPACT}}
  
-If programming was successful, you should be seeing messages appear on the terminal window as shown in the figure below. After programming the AD7980 device, the program will automatically read the value of the analog voltage input and print it via UART. Pressing [Enter] will initialize another conversion. 
  
-{{:resources:fpga:xilinx:pmod:pmodad4hyper.jpg?200|UART messeges}}+If programming was successful, you should be seeing messages appear on the terminal window as shown in the figure belowAfter programming the AD7980 device, the program will automatically read the value of the analog voltage input and print it via UART.
  
 +{{:resources:fpga:xilinx:pmod:pmodad4_hyper1.jpg?400|UART messeges}}
 +{{:resources:fpga:xilinx:pmod:pmodad4_hyper2.jpg?400|UART messeges}}
  
 +==== FPGA Configuration for ZedBoard ====
  
 +Run the **download.bat** script from the "../bin" folder downloaded from the github (see the links in the download section of the wiki page). 
 +The script will automatically configure the ZYNQ SoC and download the *.elf file afterwards.
 +
 +<WRAP center round tip 80%>
 +If the download script fails to run, modify the Xilinx Tools path in **download.bat** to match your Xilinx Installation path.
 +</WRAP>
 +
 +If programming was successful, you should be seeing messages appear on the terminal window. After programming the AD7980 device, the program will automatically read the value of the analog voltage input and print it via UART.
 ===== Using the reference design ===== ===== Using the reference design =====
  
 ==== Functional Description ==== ==== Functional Description ====
  
-The reference design is a custom SPI interface which functions in CS Mode, 3-wire, Without Busy Indicator (see AD7980 datasheet pg. 17).+=== Avnet LX-9 MicroBoard and Digilent Nexys3 ===
  
-The hardware SPI access allows reading the data sent by the AD7980using a 3-wire interface. The SPI Core sets a flag in its status register when data is available.+The reference design is a custom SPI interface which functions in CS Mode, 3-wire, Without Busy Indicator (see AD7980 datasheet pg. 17). The software programs the device, and afterwards, polling the Data Ready pin, prints the read value via UART
  
-<note important> +=== Avnet ZedBoard ===
-  * Connecting the PmodAD4 to the LX-9 Board using an extension cable provides ease of use. +
-  * UART must be set to 57600 baudrate. +
-  * The reference voltage for the AD7980 is 2.5V. +
-</note>+
  
 +The reference design is a custom SPI interface which functions in CS Mode, 3-wire, Without Busy Indicator (see AD7980 datasheet pg. 17). The software programs the device, and afterwards, using DMA, transfers 8192 samples and prints them via UART.
 +
 +<WRAP round 80% important>
 +  * Connecting the PmodAD4 to the boards using an extension cable provides ease of use.
 +  * UART must be set to 115200 Baud Rate for the Avnet LX-9 Microboard and ZedBoard or 9600 Baud Rate for the Digilent Nexys™3 Board.
 +  * The reference voltage for the AD7980 is 2.5V.
 +  * If you want to use another reference voltage, you will need to modify the VREF definition at the beginning of “main.c”. The range for VREF must be 2.4V ≤ VREF ≤ 5.1V.
 +  * If you want to use AVDD > DVDD (= 3.3V) then JP3 on PmodAD4 must be removed. The range for AVDD is 3.0V ≤ AVDD ≤ 5.5V
 +</WRAP>
  
 ===== Downloads ===== ===== Downloads =====
-{{:resources:fpga:xilinx:pmod:ad7980.zip|Reference design source code}} 
  
 +<WRAP round download 80%>
 +\\
 +**Avnet LX-9 MicroBoard: **\\
 +    * {{:resources:fpga:xilinx:pmod:ad7980_lx9.zip|Reference design source code for Avnet LX9 MicroBoard.}}\\
 +
 +**Digilent Nexys™3:**\\
 +    * {{:resources:fpga:xilinx:pmod:ad7980_nexys3.zip|Reference design source code for Digilent Nexys™3 Spartan-6 FPGA Board.}} \\
 +
 +**Avnet ZedBoard:**\\
 +    * [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodAD4/cf_ad7980_zed|XPS Project]]\\
 +    * [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodAD4/cf_lib/edk/pcores/axi_ad7980_v1_00_a|AD7980 IPCore]] \\
 +    * [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_lib|Required Project Libraries]]\\
 +    * [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodAD4|PmodAD4 Driver Files]]\\
 +    * [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodAD4/bin|Programming Script]]\\
 +    
 +</WRAP>
 +<wrap hide>
 +====== Linux Device Driver - Custom HDL PCore ======
 +
 +Connect PmodAD4 to the JD1 connector of the ZedBoard (upper row of pins).
 +
 +===== Preparing the SD Card =====
 +
 +In order to prepare the SD Card for booting Linux on the ZedBoard:
 +    * Download the device tree: [[https://github.com/analogdevicesinc/no-OS/blob/master/Pmods/PmodAD4/dts/zynq-zed-adv7511-pmod-ad4-ipcore.dts|PmodAD4 Linux devicetree]]
 +    * Download the Xilinx XPS project: [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodAD4/cf_ad7980_zed|PmodAD4 Linux XPS Project]]
 +    * Download the AD7980 IPcore: [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodAD4/cf_lib/edk/pcores/axi_ad7980_v1_00_a|AD7980 IPCore]] \\
 +    * Download the project libraries: [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_lib|Required Project Libraries]]\\
 +    * Follow the instructions on the following wiki page, but use the device tree and project downloaded on the previous step
 +        * [[/resources/tools-software/linux-drivers/platforms/zynq?s=adv7511&s=linux|Linux with HDMI video output on the ZED and ZC702]].
 +
 +Make sure you have an HDMI monitor connected to the ZedBoard, plug in the SD Card and power on the board.
 +If everything is correct, the system should boot up. If you don't have an HDMI monitor, connect to the board via UART, Baud Rate 115200.
 +
 +There are 2 ways to test the driver.
 +    * Using the terminal window
 +    * Using the ADI IIO Oscilloscope
 +
 +===== Using the terminal window =====
 +
 +Open a new terminal window by pressing **Ctrl+Alt+T**.
 +
 +Navigate to the location of the device and identify it using the following commands:
 +<code>
 +cd /sys/bus/iio/devices/
 +ls
 +iio:device0 iio:device1 trigger0
 +cd iio\:device0
 +cat name
 +AD7980
 +</code>
 +
 +If the **cat name** command doesn't return **ad7980**, then change the number of the iio:device, and check again.
 +<code>
 +cd ..
 +cd iio\:device1
 +cat name
 +</code>
 +
 +To see the list of options that the AD7980 driver provides, type:
 +<code>
 +ls
 +buffer  dev  name  power  scan_elements  subsystem  uevent
 +</code>
 +
 +To read the raw input voltage, type:
 +<code>
 +cd buffer
 +echo 128 > length
 +echo 1 > enable
 +hexdump -x /dev/iio\:device0
 +0000000    0000    dc3e    0000    dc1b    0000    dc3f    0000    dc4a
 +0000010    0000    dc2c    0000    dc3e    0000    dc25    0000    dc3d
 +0000020    0000    dc38    0000    dc2f    0000    dc2c    0000    dc22
 +0000030    0000    dc03    0000    dc1a    0000    dbfe    0000    dbff
 +0000040    0000    dc25    0000    dc29    0000    dc22    0000    dc05
 +0000050    0000    dc20    0000    dc2a    0000    dc09    0000    dc2e
 +0000060    0000    dc12    0000    dc0c    0000    dc2c    0000    dc2b
 +0000070    0000    dc3b    0000    dc2f    0000    dc2a    0000    dc14
 +</code>
 +
 +{{:resources:fpga:xilinx:pmod:ad7980_custom_linaro_terminal.jpg?600|AD7980 Read Voltage from Terminal}}
 +
 +The commands written above can also be used if not using an HDMI monitor and a wireless keyboard, by using a serial terminal, and typing the commands after the system boot-up is complete.
 +
 +{{:resources:fpga:xilinx:pmod:ad7980_custom_linux_serial.jpg?600|AD7980 Read Voltage from Serial Terminal}}
 +
 +===== Using the ADI IIO Oscilloscope =====
 +
 +Install the ADI IIO Oscilloscope using the instructions from the following wiki page:
 +    * [[/resources/tools-software/linux-software/iio_oscilloscope|IIO Oscilloscope]]
 +
 +Launch the ADI IIO Oscilloscope.
 +
 +Select **AD7980** from the **Device** drop-down menu. Set the desired number of samples in the **Sample Count** tab. Click the **Green Play Button** in order to start capturing and displaying data. Click **Stop** to stop the process.
  
 +{{:resources:fpga:xilinx:pmod:ad7980_custom_iio_plot.jpg?600|AD7980 IIO Oscilloscope Plot}}
 +</wrap>
 ===== More information ===== ===== More information =====
   * [[ez>community/fpga|ask questions about the FPGA reference design]]   * [[ez>community/fpga|ask questions about the FPGA reference design]]
   * Example questions: {{rss>http://ez.analog.com/community/feeds/allcontent/atom?community=2061 5 author 1d}}   * Example questions: {{rss>http://ez.analog.com/community/feeds/allcontent/atom?community=2061 5 author 1d}}
resources/fpga/xilinx/pmod/ad7980.1337942794.txt.gz · Last modified: 25 May 2012 12:46 (external edit)