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--- resources:fpga:xilinx:pmod:ad7156 [04 Sep 2012 15:03] – created Alexandru.Tofan
+++ resources:fpga:xilinx:pmod:ad7156 [08 Feb 2021 13:33] (current) – Change broken link Iulia Moldovan
@@ Line 6: / Line 6: @@
 **HW Platform(s):**
-   * [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]
+   * [[xilinx>products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]
    * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]
-   * [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-CDC1|PmodCDC1 (Digilent)]] \\
+   * [[http://www.em.avnet.com/en-us/design/drc/Pages/Zedboard.aspx|Avnet ZedBoard]] \\
-**System:** Microblaze, AXI, UART \\
 ===== Quick Start Guide =====
@@ Line 16: / Line 15: @@
 ==== Required Hardware ====
-  * [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]
+  * [[xilinx>products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]
   * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]
+  * [[http://www.em.avnet.com/en-us/design/drc/Pages/Zedboard.aspx|Avnet ZedBoard]] \\
   * [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-CDC1|PmodCDC1 (Digilent)]]
 ==== Required Software ====
-  * Xilinx ISE 13.2 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).
+  * Xilinx ISE 14.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).
   * A UART terminal (Tera Term/Hyperterminal), Baud rate 115200 for the Avnet LX-9 Microboard or 9600 for the Digilent Nexys™3 Board.
 ==== Running Demo (SDK) Program ====
-<note tip>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm]] for details.\\
+<WRAP center round tip 80%>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[xilinx>products/boards-and-kits/AES-S6MB-LX9.htm]] for details.\\
-If you are not familiar with Nexys™3 and/or Xilix tools, please visit\\ [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3]] for details.
+If you are not familiar with Nexys™3 and/or Xilix tools, please visit\\ [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3]] for details.\\
-</note>
+If you are not familiar with ZedBoard and/or Xilix tools, please visit\\ [[http://www.em.avnet.com/en-us/design/drc/Pages/Zedboard.aspx]] for details.</WRAP>
-Extract the project from the archive file (AD7156_<board_name>.zip) to the location you desire.
 ==== Avnet LX9 MicroBoard Setup ====
-To begin, connect the PmodCDC1 to J5 connector of LX9 board (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board.
+Extract the project from the archive file (AD7156_<board_name>.zip) to the location you desire.
+To begin, connect the PmodCDC1 to J5 connector of LX9 board (see image below). You can use an extension cable for ease of use. Connect the USB cable from the PC to the USB-UART female connector of the board for the UART terminal. The board will be programmed through its USB male connector.
 {{:resources:fpga:xilinx:pmod:pmodCDC1_lx9.jpg?200|PmodCDC1 and LX-9}}
@@ Line 41: / Line 40: @@
 ==== Digilent Nexys™3 Spartan-6 FPGA Board ====
-To begin, connect the PmodCDC1 to JA connector of NEXYS3 board (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board.
+Extract the project from the archive file (AD7156_<board_name>.zip) to the location you desire.
+To begin, connect the PmodCDC1 to JA connector of NEXYS3 board (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART).
 {{:resources:fpga:xilinx:pmod:pmodcdc1_nexys3.jpg?200|PmodCDC1 and Nexys™3}}
-==== FPGA Configuration ====
+==== Avnet ZedBoard ====
+To begin, connect the PmodCDC1 to JC1 and JA1 connector of ZedBoard (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART).
+{{:resources:fpga:xilinx:pmod:pmodcdc1_zed.jpg?400|PmodCDC1 and ZedBoard}}
+==== FPGA Configuration for Nexys3 and LX-9 MicroBoard ====
 Start IMPACT, and double click "Boundary Scan". Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal (set to appropiate baud rate) and then program the device using the bit file provided in the project *.zip archive, located in the "sw" folder (../ad7156/sw/AD7156.bit).
@@ Line 51: / Line 59: @@
 {{:resources:fpga:xilinx:pmod:PmodCDCImpact.jpg?200|Programming FPGA in IMPACT}}
-If programming was successful, the **Main Menu** will apear in your UART terminal, as seen in the picture below. There are 7 options. Pressing [1] to [5], [s] or [r] key will allow you to select the desired option.
+==== FPGA Configuration for ZedBoard ====
+Run the **download.bat** script from the "../bin" folder downloaded from the github (see the links in the download section of the wiki page).
+The script will automatically configure the ZYNQ SoC and download the *.elf file afterwards.
+<WRAP center round tip 80%>
+If the download script fails to run, modify the Xilinx Tools path in **download.bat** to match your Xilinx Installation path.
+</WRAP>
+If programming was successful, the **Main Menu** will apear in your UART terminal, as seen in the picture below. There are 7 options. Pressing [d], [c], [a], [t], [r], [m], [s] or [q] key will allow you to select the desired option.
 {{:resources:fpga:xilinx:pmod:pmodcdc1_menu1.jpg?600|Main Menu}}\\
+**Select Channels for display** allows selecting which channel(s) to display and measure.
+{{:resources:fpga:xilinx:pmod:pmodcdc1_menu2.jpg?600|Select Channels for display}}\\
-{{:resources:fpga:xilinx:pmod:pmodcdc1_menu2.jpg?600|}}\\
+**Display Capacitance** prints the selected Channel(s) measured capacitance.
+{{:resources:fpga:xilinx:pmod:pmodcdc1_menu3.jpg?600|Display Capacitance}}\\
+**Display Average Capacitance** prints the selected Channel(s) measured average capacitance.
-{{:resources:fpga:xilinx:pmod:pmodcdc1_menu3.jpg?600|}}\\
+{{:resources:fpga:xilinx:pmod:pmodcdc1_menu4.jpg?600|Display Average Capacitance}}\\
+**Set Threshold** allows setting the threshold for each channel (feature available only in fixed threshold mode).
+{{:resources:fpga:xilinx:pmod:pmodcdc1_menu5.jpg?600|Set Threshold}}\\
-{{:resources:fpga:xilinx:pmod:pmodcdc1_menu4.jpg?600|}}\\
+**Set Sensitivity** allows setting timeout for each channel.
+{{:resources:fpga:xilinx:pmod:pmodcdc1_menu6.jpg?600|Set Sensitivity}}\\
+**Set Timeout** prints Threshold mode and values for each channel.
-{{:resources:fpga:xilinx:pmod:pmodcdc1_menu5.jpg?600|}}\\
+{{:resources:fpga:xilinx:pmod:pmodcdc1_menu7.jpg?600|Set Timeout}}\\
+**Set Input Range** allows setting the input range for each channel.
+{{:resources:fpga:xilinx:pmod:pmodcdc1_menu8.jpg?600|Set Input Range}}\\
-{{:resources:fpga:xilinx:pmod:pmodcdc1_menu6.jpg?600|}}\\
+**Threshold menu** allows selecting between Fixed Threshold and Adaptive Threshold.
+{{:resources:fpga:xilinx:pmod:pmodcdc1_menu9.jpg?600|Threshold menu}}\\
+{{:resources:fpga:xilinx:pmod:pmodcdc1_menu10.jpg?600|Threshold menu}}\\
-{{:resources:fpga:xilinx:pmod:pmodcdc1_menu7.jpg?600|}}\\
+**Display current settings** prints Threshold mode, type and also the values for each channel.
+{{:resources:fpga:xilinx:pmod:pmodcdc1_menu11.jpg?600|Display current settings}}\\
+{{:resources:fpga:xilinx:pmod:pmodcdc1_menu12.jpg?600|Display current settings}}\\
-{{:resources:fpga:xilinx:pmod:pmodcdc1_menu8.jpg?600|}}\\
+**Stop and return to menu** will stop any ongoing action and will display the menu with all the available options.
+{{:resources:fpga:xilinx:pmod:pmodcdc1_menu13.jpg?600|Stop and return to menu}}\\
 ===== Using the reference design =====
@@ Line 89: / Line 122: @@
 The reference design is a SPI interface used to communicate with the device. The software programs the AD7156s internal registers, and afterwards reads desired data from the device and prints it via UART. Interrupts are used to turn on LEDs and start a timer (LEDs stay ON for 1 second).
-<note important>
+<WRAP round important 80%>
+\\
   * Connecting the PmodCDC1 to the boards using an extension cable provides ease of use.
-  * UART must be set to 115200 Baud Rate for the Avnet LX-9 Microboard or 9600 Baud Rate for the Digilent Nexys™3 Board.
+  * UART must be set to 115200 Baud Rate for the Avnet LX-9 Microboard and ZedBoard or 9600 Baud Rate for the Digilent Nexys™3 Board.
-</note>
+\\
+</WRAP>
+<WRAP round important 80%>
+When using the ZedBoard reference design in order to develop your own software, please make sure that the following options are set in "system_config.h":
+<code c>
+// Select between PS7 or AXI Interface
+#define USE_PS7 	 1
+// SPI used in the design
+#define USE_SPI		 0
+// I2C used in the design
+#define USE_I2C		 1
+// Timer (+interrupts) used in the design
+#define USE_TIMER	 1
+// External interrupts used in the design
+#define USE_EXTERNAL     1
+// GPIO used in the design
+#define USE_GPIO         1
+</code>
+</WRAP>
 ===== Downloads =====
-{{:resources:fpga:xilinx:pmod:ad7156_lx9.zip|Reference design source code for Avnet LX9 MicroBoard.}}\\
-{{:resources:fpga:xilinx:pmod:ad7156_nexys3.zip|Reference design source code for Digilent Nexys™3 Spartan-6 FPGA Board.}}
+<WRAP round download 80%>
+\\
+**Avnet LX-9 MicroBoard: **\\
+    * {{:resources:fpga:xilinx:pmod:ad7156_lx9.zip|Reference design source code for Avnet LX9 MicroBoard.}}\\
+**Digilent Nexys™3:**\\
+    * {{:resources:fpga:xilinx:pmod:ad7156_nexys3.zip|Reference design source code for Digilent Nexys™3 Spartan-6 FPGA Board.}}\\
+**Avnet ZedBoard:**\\
+    * [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_adv7511_zed|XPS Project]]\\
+    * [[https://github.com/analogdevicesinc/no-OS/tree/master/legacy/Pmods/PmodCDC1|PmodCDC1 Driver Files]]\\
+    * [[https://github.com/analogdevicesinc/no-OS/tree/master/legacy/Pmods/Common/sw|ZYNQ SoC Peripherals Driver Files]] \\
+    * [[https://github.com/analogdevicesinc/no-OS/tree/master/legacy/Pmods/PmodCDC1/bin|Programming Script]]\\
+</WRAP>
+<wrap hide>
+====== Linux Device Driver ======
+Connect PmodCDC1 to the JC1 connector of the ZedBoard (upper row of pins).
+===== Preparing the SD Card =====
+In order to prepare the SD Card for booting Linux on the ZedBoard:
+    * Download the device tree: [[https://github.com/analogdevicesinc/no-OS/tree/master/legacy/Pmods/PmodCDC1/dts|PmodCDC1 Linux devicetree]]
+    * Follow the instructions on the following wiki page, but use the device tree downloaded on the previous step
+        * [[/resources/tools-software/linux-drivers/platforms/zynq?s=adv7511&s=linux|Linux with HDMI video output on the ZED and ZC702]].
+Make sure you have an HDMI monitor connected to the ZedBoard, plug in the SD Card and power on the board.
+If everything is correct, the system should boot up. If you don't have an HDMI monitor, connect to the board via UART, Baud Rate 115200.
+There are 2 ways to test the driver.
+    * Using the terminal window
+    * Using a serial terminal
+===== Using the terminal window =====
+Open a new terminal window by pressing **Ctrl+Alt+T**.
+Navigate to the location of the device and identify it using the following commands:
+<code>
+cd /sys/bus/iio/devices/
+ls
+iio:device0 iio:device1
+cd iio\:device0
+cat name
+ad7156
+</code>
+If the **cat name** command doesn't return **ad7156**, then change the number of the iio:device, and check again.
+<code>
+cd ..
+cd iio\:device1
+cat name
+</code>
+To see the list of options that the AD7156 driver provides, type:
+<code>
+ls
+dev     in_capacitance0_mean_raw  in_capacitance1_mean_raw  name   subsystem
+events  in_capacitance0_raw       in_capacitance1_raw       power  uevent
+</code>
+To read the raw capacitance for channel 0, type:
+<code>
+cat in_capacitance0_raw
+</code>
+To read the mean raw capacitance for channel 0, type:
+<code>
+cat in_capacitance0_mean_raw
+</code>
+If you want to read the capacitance for another channel, replace **in_capacitance0_raw** with, for example, **in_capacitance1_raw**.
+{{:resources:fpga:xilinx:pmod:ad7156_linaro_terminal.jpg?600|AD7156 Set Voltage from Terminal}}
+The commands written above can also be used if not using an HDMI monitor and a wireless keyboard, by using a serial terminal, and typing the commands after the system boot-up is complete.
+{{:resources:fpga:xilinx:pmod:ad7156_linux_serial.jpg?600|AD7156 Read Voltage from Serial Terminal}}
+</wrap>
 ===== More information =====
   * [[ez>community/fpga|ask questions about the FPGA reference design]]
   * Example questions: {{rss>http://ez.analog.com/community/feeds/allcontent/atom?community=2061 5 author 1d}}

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