This version is outdated by a newer approved version.
This version (03 Jan 2013 20:42) is a draft.
Approvals: 0/1The Previously approved version (10 Dec 2012 15:56) is available.
This version (03 Jan 2013 20:42) is a draft.Approvals: 0/1The Previously approved version (10 Dec 2012 15:56) is available.
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Table of Contents
AD5160 Pmod Xilinx FPGA Reference Design
Introduction
The AD5160 provides a compact 2.9 mm × 3 mm packaged solution for 256-position adjustment applications. These devices perform the same electronic adjustment function as mechanical potentiometers1 or variable resistors but with enhanced resolution, solid-state reliability, and superior low temperature coefficient performance. The wiper settings are controllable through an SPI-compatible digital interface. The resistance between the wiper and either end point of the fixed resistor varies linearly with respect to the digital code transferred into the RDAC latch. Operating from a 2.7 V to 5.5 V power supply and consuming less than 5 μA allows for usage in portable battery-operated applications.
HW Platform(s):
System: Microblaze, AXI, UART
Quick Start Guide
The bit file provided in the project *.zip file combines the FPGA bit file and the SDK elf files. It may be used for a quick check on the system. All you need is the hardware and a PC running a UART terminal and the programmer (IMPACT).
Required Hardware
Required Software
- Xilinx ISE 13.2 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).
- A UART terminal (Tera Term/Hyperterminal), Baud rate 115200 for the Avnet LX-9 Microboard or 9600 for the Digilent Nexys™3 Board.
Running Demo (SDK) Program
If you are not familiar with LX9 and/or Xilix tools, please visit
http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm for details.
If you are not familiar with Nexys™3 and/or Xilix tools, please visit
http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3 for details.
Extract the project from the archive file (AD5160_<board_name>.zip) to the location you desire.
Avnet LX9 MicroBoard Setup
To begin, connect the PmodDPOT to J4 connector of LX9 board, pins 1 to 6 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board.
Digilent Nexys™3 Spartan-6 FPGA Board
To begin, connect the PmodDPOT to JB connector of Nexys™3 board, pins JB1 to JB6 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board.
FPGA Configuration
Start IMPACT, and double click “Boundary Scan”. Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal (set the appropiate baud rate) and then program the device using the bit file provided in the project *.zip archive, located in the “sw” folder (../ad5160/sw/AD5160.bit).
If programming was successful, the Main Menu will appear in the UART terminal, as seen in the picture below. There are 2 options:
- Press [1] to select Set PmodDPOT Division Factor.
- Press [2] to select Calibration Mode.
Set PmodDPOT Division Factor Mode allows entering a value between 0x00 and 0xFF, representing the division factor desired. If the number of input characters is less than 2 (e.g. 9 or f), the [Enter] key must be pressed in order to validate the input. If 2 characters are input, the value is automatically validated (in order to prevent entering more than 2 characters).
Pressing the [q] key at any time exits the Set PmodDPOT Division Factor Mode and displays the Main Menu again.
Calibration Mode allows setting measured values for your own PmodDPOT (default values are displayed when launching application). These values are different due to external factors, such as ambient temperature. First you are prompted to enter the resistance value measured between A and B on the PmodDPOT measured in ohms. If the number of input characters is less than 5, the [Enter] key must be pressed in order to validate the input. After entering the value for Rab, you must enter the value measured between W and B. If the number of input characters is less than 3, the [Enter] key must be pressed in order to validate the input.
Using the reference design
Functional Description
The reference design is a simple SPI interface with CS, SCLK and MOSI pins. The information is displayed on UART.
The hardware SPI access allows sending data to the AD5160, programming its internal register with the required ratio between Rwb and Rwa according to Rab and Rwp.
- Connecting the PmodDPOT to the boards using an extension cable provides ease of use.
- UART must be set to 115200 Baud Rate for the Avnet LX-9 Microboard or 9600 Baud Rate for the Digilent Nexys™3 Board.
Downloads
More information
- Example questions:
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resources/fpga/xilinx/pmod/ad5160.1357242155.txt.gz · Last modified: 29 Mar 2013 10:30 (external edit)