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resources:fpga:xilinx:pmod:ad5160 [10 Dec 2012 15:56] – Download Wrapper Alexandru.Tofanresources:fpga:xilinx:pmod:ad5160 [09 Jan 2021 00:49] (current) – user interwiki links Robin Getz
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 **HW Platform(s):**  **HW Platform(s):** 
-   * [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]] +   * [[xilinx>products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]] 
    * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]    * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]
-   * [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-DPOT|PmodDPOT (Digilent)]] \\ +   * [[http://www.em.avnet.com/en-us/design/drc/Pages/Zedboard.aspx|Avnet ZedBoard]] \\
-**System:** Microblaze, AXI, UART \\+
  
 ===== Quick Start Guide ===== ===== Quick Start Guide =====
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 ==== Required Hardware ==== ==== Required Hardware ====
-  * [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]+  * [[xilinx>products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]
   * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]   * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]
 +  * [[http://www.em.avnet.com/en-us/design/drc/Pages/Zedboard.aspx|Avnet ZedBoard]] 
   * [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-DPOT|PmodDPOT (Digilent)]]   * [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-DPOT|PmodDPOT (Digilent)]]
  
  
 ==== Required Software ==== ==== Required Software ====
-  * Xilinx ISE 13.(Programmer (IMPACT) is sufficient for the demo and is available on Webpack). +  * Xilinx ISE 14.(Programmer (IMPACT) is sufficient for the demo and is available on Webpack). 
-  * A UART terminal (Tera Term/Hyperterminal), Baud rate 115200 for the Avnet LX-9 Microboard or 9600 for the Digilent Nexys™3 Board.+  * A UART terminal (Tera Term/Hyperterminal), Baud rate 115200 for the Avnet LX-9 Microboard and ZedBoard or 9600 for the Digilent Nexys™3 Board.
  
 ==== Running Demo (SDK) Program ==== ==== Running Demo (SDK) Program ====
  
-<note tip>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm]] for details.\\ +<WRAP center round tip 80%>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[xilinx>products/boards-and-kits/AES-S6MB-LX9.htm]] for details.\\ 
-If you are not familiar with Nexys™3 and/or Xilix tools, please visit\\ [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3]] for details. +If you are not familiar with Nexys™3 and/or Xilix tools, please visit\\ [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3]] for details.\\ 
-</note> +If you are not familiar with ZedBoard and/or Xilix tools, please visit\\ [[http://www.em.avnet.com/en-us/design/drc/Pages/Zedboard.aspx]] for details.</WRAP>
- +
-Extract the project from the archive file (AD5160_<board_name>.zip) to the location you desire+
  
 ==== Avnet LX9 MicroBoard Setup ==== ==== Avnet LX9 MicroBoard Setup ====
  
-To begin, connect the PmodDPOT to J4 connector of LX9 board, pins 1 to 6 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board.+Extract the project from the archive file (AD5160_<board_name>.zip) to the location you desire.  
 + 
 +To begin, connect the PmodDPOT to J4 connector of LX9 board, pins 1 to 6 (see image below). You can use an extension cable for ease of use. Connect the USB cable from the PC to the USB-UART female connector of the board for the UART terminal. The board will be programmed through its USB male connector.
  
 {{:resources:fpga:xilinx:pmod:pmoddpot.jpg?200|PmodDPOT and LX-9}} {{:resources:fpga:xilinx:pmod:pmoddpot.jpg?200|PmodDPOT and LX-9}}
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 ==== Digilent Nexys™3 Spartan-6 FPGA Board ==== ==== Digilent Nexys™3 Spartan-6 FPGA Board ====
  
-To begin, connect the PmodDPOT to JB connector of Nexys™3 board, pins JB1 to JB6 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board.+Extract the project from the archive file (AD5160_<board_name>.zip) to the location you desire.  
 + 
 +To begin, connect the PmodDPOT to JB connector of Nexys™3 board, pins JB1 to JB6 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART).
  
 {{:resources:fpga:xilinx:pmod:pmoddpot_nexys3.jpg?200|PmodDPOT and Nexys™3}} {{:resources:fpga:xilinx:pmod:pmoddpot_nexys3.jpg?200|PmodDPOT and Nexys™3}}
  
-==== FPGA Configuration ====+==== Avnet ZedBoard ==== 
 + 
 +To begin, connect the PmodDPOT to JA1 connector of ZedBoard (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART). 
 + 
 +{{:resources:fpga:xilinx:pmod:pmoddpot_zed.jpg?200|PmodDPOT and ZedBoard}} 
 + 
 +==== FPGA Configuration for Nexys3 and LX-9 MicroBoard ====
  
 Start IMPACT, and double click "Boundary Scan". Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal (set the appropiate baud rate) and then program the device using the bit file provided in the project *.zip archive, located in the "sw" folder (../ad5160/sw/AD5160.bit). Start IMPACT, and double click "Boundary Scan". Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal (set the appropiate baud rate) and then program the device using the bit file provided in the project *.zip archive, located in the "sw" folder (../ad5160/sw/AD5160.bit).
  
 {{:resources:fpga:xilinx:pmod:PmodDPOTImpact.jpg?200|Programming FPGA in IMPACT}} {{:resources:fpga:xilinx:pmod:PmodDPOTImpact.jpg?200|Programming FPGA in IMPACT}}
 +
 +==== FPGA Configuration for ZedBoard ====
 +
 +Run the **download.bat** script from the "../bin" folder downloaded from the github (see the links in the download section of the wiki page). 
 +The script will automatically configure the ZYNQ SoC and download the *.elf file afterwards.
 +
 +<WRAP center round tip 80%>
 +If the download script fails to run, modify the Xilinx Tools path in **download.bat** to match your Xilinx Installation path.
 +</WRAP>
  
 If programming was successful, the **Main Menu** will appear in the UART terminal, as seen in the picture below. If programming was successful, the **Main Menu** will appear in the UART terminal, as seen in the picture below.
 There are 2 options: There are 2 options:
-  * Press **[1]** to select **Set PmodDPOT Division Factor**. +  * Press **[d]** to select **Set PmodDPOT Division Factor**. 
-  * Press **[2]** to select **Calibration Mode**.+  * Press **[c]** to select **Calibration Mode**.
  
 {{:resources:fpga:xilinx:pmod:pmoddpot_menu1.jpg?600|Main Menu}} {{:resources:fpga:xilinx:pmod:pmoddpot_menu1.jpg?600|Main Menu}}
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 The hardware SPI access allows sending data to the AD5160, programming its internal register with the required ratio between Rwb and Rwa according to Rab and Rwp. The hardware SPI access allows sending data to the AD5160, programming its internal register with the required ratio between Rwb and Rwa according to Rab and Rwp.
  
-<note important>+<WRAP round 80% important> 
 +\\
   * Connecting the PmodDPOT to the boards using an extension cable provides ease of use.   * Connecting the PmodDPOT to the boards using an extension cable provides ease of use.
-  * UART must be set to 115200 Baud Rate for the Avnet LX-9 Microboard or 9600 Baud Rate for the Digilent Nexys™3 Board. +  * UART must be set to 115200 Baud Rate for the Avnet LX-9 Microboard and ZedBoard or 9600 Baud Rate for the Digilent Nexys™3 Board. 
-</note>+\\ 
 +</WRAP>
  
 +<WRAP round important 80%>
 +When using the ZedBoard reference design in order to develop your own software, please make sure that the following options are set in "system_config.h":
 +
 +<code c>
 +// Select between PS7 or AXI Interface
 +#define USE_PS7 1
 +// SPI used in the design
 +#define USE_SPI 1
 +// I2C used in the design
 +#define USE_I2C 0
 +// Timer (+interrupts) used in the design
 +#define USE_TIMER 0
 +// External interrupts used in the design
 +#define USE_EXTERNAL     0
 +// GPIO used in the design
 +#define USE_GPIO         0
 +</code>
 +
 +</WRAP>
  
 ===== Downloads ===== ===== Downloads =====
-<WRAP round download 50%> +<WRAP round download 80%> 
-{{:resources:fpga:xilinx:pmod:ad5160_lx9.zip|Reference design source code for Avnet LX9 MicroBoard.}} \\ +\\ 
-{{:resources:fpga:xilinx:pmod:ad5160_nexys3.zip|Reference design source code for Digilent Nexys™3 Spartan-6 FPGA Board.}} \\+**Avnet LX-9 MicroBoard: **\\ 
 +    * {{:resources:fpga:xilinx:pmod:ad5160_lx9.zip|Reference design source code for Avnet LX9 MicroBoard.}} \\ 
 + 
 +**Digilent Nexys™3: **\\ 
 +    * {{:resources:fpga:xilinx:pmod:ad5160_nexys3.zip|Reference design source code for Digilent Nexys™3 Spartan-6 FPGA Board.}} \\ 
 + 
 +**Avnet ZedBoard: ** \\ 
 +    * [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_adv7511_zed|XPS Project]]\\ 
 +    * [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodDPOT|PmodDPOT Driver Files]]\\ 
 +    * [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/Common/sw|ZYNQ SoC Peripherals Driver Files]] \\ 
 +    * [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodDPOT/bin|Programming Script]]\\
 </WRAP> </WRAP>
  
 +<wrap hide>
 +====== Linux Device Driver ======
 +
 +Connect PmodDPOT to the JB1 connector of the ZedBoard (upper row of pins).
 +
 +===== Preparing the SD Card =====
 +
 +In order to prepare the SD Card for booting Linux on the ZedBoard:
 +    * Download the device tree: [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodDPOT/dts|PmodDPOT Linux devicetree]]
 +    * Follow the instructions on the following wiki page, but use the device tree downloaded on the previous step
 +        * [[/resources/tools-software/linux-drivers/platforms/zynq?s=adv7511&s=linux|Linux with HDMI video output on the ZED and ZC702]].
 +
 +Make sure you have an HDMI monitor connected to the ZedBoard, plug in the SD Card and power on the board.
 +If everything is correct, the system should boot up. If you don't have an HDMI monitor, connect to the board via UART, Baud Rate 115200.
 +
 +There are 2 ways to test the driver.
 +    * Using the terminal window
 +    * Using a serial terminal
 +
 +===== Using the terminal window =====
 +
 +Open a new terminal window by pressing **Ctrl+Alt+T**.
 +
 +Navigate to the location of the device and identify it using the following commands:
 +<code>
 +cd /sys/bus/spi/devices/
 +ls
 +spi32765.0  spi32766.0
 +cd spi32766.0
 +ls
 +driver  modalias  power  rdac0  subsystem  uevent
 +cat modalias
 +spi:ad5160
 +</code>
 +
 +If the **cat modalias** command doesn't return **spi:ad5160**, then change the number of the spi device, and check again.
 +<code>
 +cd ..
 +cd spi32765.0
 +cat modalias
 +</code>
 +
 +To see the list of options that the AD5160 driver provides, type:
 +<code>
 +ls
 +driver  modalias  power  rdac0  subsystem  uevent
 +</code>
 +
 +To set the rdac resistance, type:
 +<code>
 +echo 100 > rdac0
 +</code>
 +
 +To read the set rdac value, type:
 +<code>
 +cat rdac0
 +100
 +</code>
 +{{:resources:fpga:xilinx:pmod:ad5160_linaro_terminal.jpg?600|AD5628 Set Voltage from Terminal}}
 +
 +The commands written above can also be used if not using an HDMI monitor and a wireless keyboard, by using a serial terminal, and typing the commands after the system boot-up is complete.
  
 +{{:resources:fpga:xilinx:pmod:ad5160_linux_serial.jpg?600|AD5628 Read Voltage from Serial Terminal}}
 +</wrap>
 ===== More information ===== ===== More information =====
   * [[ez>community/fpga|ask questions about the FPGA reference design]]   * [[ez>community/fpga|ask questions about the FPGA reference design]]
   * Example questions: {{rss>http://ez.analog.com/community/feeds/allcontent/atom?community=2061 5 author 1d}}   * Example questions: {{rss>http://ez.analog.com/community/feeds/allcontent/atom?community=2061 5 author 1d}}
resources/fpga/xilinx/pmod/ad5160.1355151380.txt.gz · Last modified: 10 Dec 2012 15:56 by Alexandru.Tofan