Wiki

Analog Devices Wiki

English
English
简体中文
简体中文
日本語
日本語
Руccкий
Руccкий

Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revisionPrevious revision
Next revision		Previous revision
Next revisionBoth sides next revision
resources:fpga:xilinx:kc705:adv7511 [04 Apr 2014 10:42] – Updated the download links. Dragos Bogdanresources:fpga:xilinx:kc705:adv7511 [19 Jun 2014 08:28] – [Software Setup for Vivado] Lucian Sin
Line 7: Line 7:
 ===== Supported Carriers ===== ===== Supported Carriers =====
  
-  * [[xilinx>AC701]]  +^ Board     ^ XPS     ^ Vivado     ^ 
-  * [[xilinx>KC705]]  +| [[xilinx>AC701]] |  **x**  |  **x**  | 
-  * [[xilinx>VC707]] +| [[xilinx>KC705]] |  **x**  |  **x**  | 
-  * [[xilinx>ZC702]]  +| [[xilinx>VC707]] |  **x**  |  **x**  | 
-  * [[xilinx>ZC706]] +| [[xilinx>ZC702]] |  **x**  |  **x**  | 
-  * [[http://www.zedboard.org|Zed Board]] +| [[xilinx>ZC706]] |  **x**  |  **x**  | 
 +| [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,1028&Prod=ZEDBOARD|Digilent ZED  
 +Board]] |  **x**  |  **x**  |  
 + 
 +<WRAP round important 80%> 
 +\\ 
 +The XPS projects remain on this website only for legacy purposes. The support for them has been discontinued.  
 +</WRAP> 
  
 ==== Required Hardware ==== ==== Required Hardware ====
Line 22: Line 30:
  
   * Xilinx ISE 14.6 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).   * Xilinx ISE 14.6 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).
-  * A UART terminal (Tera Term/Hyperterminal), Baud rate 57600 for AC701/KC705/VC707 or 115200 for ZC702/ZC706/Zed.+  * A UART terminal (Tera Term/Hyperterminal) 
 +      * For ISE, Baud rate 57600 for AC701/KC705/VC707 and 115200 for ZC702/ZC706/Zed. 
 +      * For Vivado, Baud rate 115200 for AC701/KC705/VC707/ZC702/ZC706/Zed 
  
 ==== Running Demo (SDK) Program ==== ==== Running Demo (SDK) Program ====
Line 34: Line 44:
 If programming was successful, you should be seeing messages appear on the terminal as shown in figure below.  If programming was successful, you should be seeing messages appear on the terminal as shown in figure below. 
  
-{{:resources:fpga:xilinx:fmc:fmc-imageon:adv7511_lib_test.png?300|Terminal}}+{{:resources:fpga:xilinx:fmc:fmc-imageon:adv7511_lib_test.png?400|Terminal}}
  
 The reference design contains an example of how to: The reference design contains an example of how to:
Line 45: Line 55:
 ==== Functional description ==== ==== Functional description ====
  
-|{{.:cf_adv7511_bd.jpg?200|Block Diagram}} |+|{{.:cf_adv7511_bd.jpg?400|Block Diagram}} |
  
 The reference design consists of two independent pcore modules. The reference design consists of two independent pcore modules.
Line 98: Line 108:
  
 The project contains 2 components: the Reference Design files and the ADV7511 Transmitter Library. All the components have to be downloaded from the links provided in the **Downloads** section. The project contains 2 components: the Reference Design files and the ADV7511 Transmitter Library. All the components have to be downloaded from the links provided in the **Downloads** section.
-==== Software Setup ====+ 
 +==== Software Setup for ISE Design Suite ====
 The **HDL Reference Design** for each supported Xilinx FPGA board contains a folder called //**SDK_Workspace**// which stores the Xilinx SDK project files needed to build the no-OS software and also the .bit files with the HDL design that must be programmed into the FPGA. The **HDL Reference Design** for each supported Xilinx FPGA board contains a folder called //**SDK_Workspace**// which stores the Xilinx SDK project files needed to build the no-OS software and also the .bit files with the HDL design that must be programmed into the FPGA.
 These are the steps that need to be followed to recreate the software project: These are the steps that need to be followed to recreate the software project:
   * Copy the //**SDK_Workspace**// folder on your PC. Make sure that the path where it is stored does not contain any spaces.   * Copy the //**SDK_Workspace**// folder on your PC. Make sure that the path where it is stored does not contain any spaces.
   * Copy the library file to the //**SDK_Workspace/sw/lib**// folder.   * Copy the library file to the //**SDK_Workspace/sw/lib**// folder.
-{{:resources:fpga:xilinx:fmc:fmc-imageon:lib_files.png?600|Library file}}+{{ :resources:fpga:xilinx:fmc:fmc-imageon:lib_files.png?600 | Library file }}
   * Copy the library headers to the //**SDK_Workspace/sw/inc**// folder.   * Copy the library headers to the //**SDK_Workspace/sw/inc**// folder.
-{{:resources:fpga:xilinx:fmc:fmc-imageon:inc_files.png?600|Library headers}}+{{ :resources:fpga:xilinx:fmc:fmc-imageon:inc_files.png?600 | Library headers }}
   * Copy the Reference Design files to the //**SDK_Workspace/sw/src**// folder.   * Copy the Reference Design files to the //**SDK_Workspace/sw/src**// folder.
-{{:resources:fpga:xilinx:fmc:fmc-imageon:src_files.png?600|ADV7511 Transmitter Library Demo files}}+{{ :resources:fpga:xilinx:fmc:fmc-imageon:src_files.png?600 | ADV7511 Transmitter Library Demo files }}
   * Open the Xilinx SDK. When the SDK starts it asks for a to provide a folder where to store the workspace. Any folder can be provided.   * Open the Xilinx SDK. When the SDK starts it asks for a to provide a folder where to store the workspace. Any folder can be provided.
   * In the SDK select the //**File->Import**// menu option to import the software projects into the workspace.   * In the SDK select the //**File->Import**// menu option to import the software projects into the workspace.
-{{:resources:fpga:xilinx:fmc:fmc-imageon:file_import.png?300|Import Projects}}+{{ :resources:fpga:xilinx:fmc:fmc-imageon:file_import.png?300 | Import Projects }}
   * In the //Import// window select the //**General->Existing Projects into Workspace**// option.   * In the //Import// window select the //**General->Existing Projects into Workspace**// option.
-{{:resources:fpga:xilinx:fmc:fmc-imageon:existing_project_import.png?300|Existing Projects Import}}+{{ :resources:fpga:xilinx:fmc:fmc-imageon:existing_project_import.png?300 | Existing Projects Import }}
   * In the //Import Projects// window select the //**SDK_Workspace**// folder as root directory. After the root directory is chosen the projects that reside in that directory will appear in the //Projects// list. Press //Finish// to finalize the import process.   * In the //Import Projects// window select the //**SDK_Workspace**// folder as root directory. After the root directory is chosen the projects that reside in that directory will appear in the //Projects// list. Press //Finish// to finalize the import process.
-{{:resources:fpga:xilinx:fmc:fmc-imageon:projects_import.png?300|Projects Import}}+{{ :resources:fpga:xilinx:fmc:fmc-imageon:projects_import.png?300 | Projects Import }}
   * The //Project Explorer// window now shows the projects that exist in the workspace and the files for each project. The SDK should automatically build the projects and the //Console// window will display the the result of the build. If the build is not done automatically select the //**Project->Build Automatically**// menu option.   * The //Project Explorer// window now shows the projects that exist in the workspace and the files for each project. The SDK should automatically build the projects and the //Console// window will display the the result of the build. If the build is not done automatically select the //**Project->Build Automatically**// menu option.
-{{:resources:fpga:xilinx:fmc:fmc-imageon:project_explorer.png?300|Project Explorer}}+{{ :resources:fpga:xilinx:fmc:fmc-imageon:project_explorer.png?300 | Project Explorer }} 
 + 
 +==== Software Setup for Vivado ==== 
 + 
 +Example for a ZC702 board: 
 +  * After [[http://wiki.analog.com/resources/fpga/docs/hdl/vivado | building the project in Vivado]] for the used FPGA board, a //**SDK_Export**// folder will be created in //**../adv7511_board.sdk/SDK**// 
 +  * Open the Xilinx SDK for Vivado. When the SDK starts it asks to provide a folder where to store the workspace. Any folder can be provided.  
 +  * Go to //**File->New->Application project**// 
 +{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_new_app_project.png?600 | New Application Project }} 
 +  * Use a new hardware platform, so choose //**Create new**// in //**Hardware Platform**// 
 +{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_new_platform.png?400 | New Platform }}   
 +  * In //**Target Hardware Specification**// browse the location of //**SDK_Export\hw\system.xml**// and click //**Finish**// 
 +{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_new_hardware_project.png?400 | New Hardware Project }}  
 +  * Then give a name to the project and click //**Next**// 
 +{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_project_name.png?400 | Project Name }}   
 +  * In the next window choose //**Empty Application**// and click //**Finish**// 
 +{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_templates.png?400 | Available Templates }}    
 +  * Now the project without source code looks like this 
 +{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_empty_project_zynq.png?600 | Empty Project }}  
 +  * Then the no-OS software for the used FPGA board must be added from Github. Also the library must be added (ZC library for a Zynq based platform or Microblaze library for AC701,KC705,VC707). 
 +{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_project_without_include_directory_and_library.png?600 | Project without directory and library path }}  
 +  * Afterwards click right on project name and go to //**Properties**// 
 +{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_project_properties.png?600 | Project properties }} 
 +  * In the window that appears, go to //**Settings->Directories**// and include the path of the //**inc**// directory for both //**Debug**// and //**Release**// configurations. 
 +{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_settings_include_directory_path.png?600 | Include directory path }} 
 +  * In the same window, go to //**Settings->Libraries**// and add the path of the //**lib**// folder and the name of the library used. For a Zynq based platform the name is //**HDMI_ZynqLib**// (libHDMI_ZynqLib.a on Github) and for a Microblaze the name is //**HDMI_MicroblazeLib**// (libHDMI_MicroblazeLib.a on Github)  
 +{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_settings_include_library_path.png?600 | Include library path }} 
 +  * The //Project Explorer// window now shows the projects that exist in the workspace and the files for each project. The SDK should automatically build the projects and the Console window will display the the result of the build. If the build is not done automatically select the //**Project->Build Automatically**// menu option. 
 +{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_project_explorer_zynq.png?600 | Project Explorer }} 
 +  * At this point the software project setup is complete, the FPGA can be programmed and the software can be downloaded into the system. 
 +  * The no-OS drivers source code does the following actions: 
 +    * Initializes the HDMI core; 
 +    * Initializes the ADV7511 part; 
 +    * Transmits to a HDMI capable monitor an image whoose resolution can be changed by typing in the terminal a number from 0 to 6; 
 +    * Transmits to a HDMI capable monitor a sound.  
 +  * This is what is transmitted through UART: 
 +{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_uart.png?400 | UART }} 
 +  * The output of the example program can be viewed in the SDK console by enabling the //Connect STDIO Console// option and setting the baud rate of the UART port to 115200. 
 +{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_stdio_config_vivado.png?600 | STDIO configuration }}  
 + 
 +As an alternative an UART terminal can be used to capture the output of the example program. The number of used UART port depends on the computer's configuration. The following settings must be used in the UART terminal: 
 +  * Baud Rate: 115200bps 
 +  * Data: 8 bit 
 +  * Parity: None 
 +  * Stop bits: 1 bit 
 +  * Flow Control: none 
 + 
 ===== Downloads ===== ===== Downloads =====
  
-The HDL Reference Designs and the no-OS Software can be downloaded from the Analog Devices github.\\+The HDL Reference Designs and the no-OS Software can be downloaded from the Analog Devices Github.\\
 \\ \\
 <WRAP round important 80%> <WRAP round important 80%>
Line 138: Line 196:
 **HDL Reference Designs:** **HDL Reference Designs:**
 <WRAP round download 80%> <WRAP round download 80%>
-    * **AC701 HDL Reference Design: ** [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_adv7511_ac701]] +    * **AC701 HDL Reference Design for ISE: ** [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_adv7511_ac701]] 
-    * **KC705 HDL Reference Design: ** [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_adv7511_kc705]] +    * **KC705 HDL Reference Design for ISE: ** [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_adv7511_kc705]] 
-    * **VC707 HDL Reference Design: ** [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_adv7511_vc707]] +    * **VC707 HDL Reference Design for ISE: ** [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_adv7511_vc707]] 
-    * **ZC702 HDL Reference Design: ** [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_adv7511_zc702]] +    * **ZC702 HDL Reference Design for ISE: ** [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_adv7511_zc702]] 
-    * **ZC706 HDL Reference Design: ** [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_adv7511_zc706]] +    * **ZC706 HDL Reference Design for ISE: ** [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_adv7511_zc706]] 
-    * **Zed HDL Reference Design: ** [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_adv7511_zed]]+    * **Zed HDL Reference Design for ISE: ** [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_adv7511_zed]] 
 + 
 +    * **AC701 HDL Reference Design for Vivado: ** https://github.com/analogdevicesinc/hdl/tree/master/projects/adv7511/ac701 
 +    * **KC705 HDL Reference Design for Vivado: ** https://github.com/analogdevicesinc/hdl/tree/master/projects/adv7511/kc705 
 +    * **vC707 HDL Reference Design for Vivado: ** https://github.com/analogdevicesinc/hdl/tree/master/projects/adv7511/vc707 
 +    * **ZC702 HDL Reference Design for Vivado: ** https://github.com/analogdevicesinc/hdl/tree/master/projects/adv7511/zc702 
 +    * **ZC706 HDL Reference Design for Vivado: ** https://github.com/analogdevicesinc/hdl/tree/master/projects/adv7511/zc706 
 +    * **ZED HDL Reference Design for Vivado: ** https://github.com/analogdevicesinc/hdl/tree/master/projects/adv7511/zed
 </WRAP> </WRAP>
  
Line 180: Line 245:
   * [[ez>community/fpga|Ask questions about the FPGA reference design]]   * [[ez>community/fpga|Ask questions about the FPGA reference design]]
   * [[resources/tools-software/linux-drivers/platforms/zynq|Linux with HDMI video output on the ZED and ZC702 boards]]   * [[resources/tools-software/linux-drivers/platforms/zynq|Linux with HDMI video output on the ZED and ZC702 boards]]
- 
resources/fpga/xilinx/kc705/adv7511.txt · Last modified: 08 Feb 2021 13:21 by Iulia Moldovan

Page Tools