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Files in resources:eval:developer-kits:2to24ghz-mxfe-rf-front-end
- 3d_layout_mockup.jpg
- 2711×1496
- 21 Jul 2022 16:14
- 218.7 KB
- 11.5g.png
- 3522×1765
- 23 Jun 2023 17:38
- 158.2 KB
- 11.5g_table.png
- 3115×620
- 23 Jun 2023 17:44
- 309.3 KB
- 18g.png
- 3272×1687
- 23 Jun 2023 17:29
- 123.4 KB
- 18g_table.png
- 2907×660
- 23 Jun 2023 17:25
- 290.6 KB
- 22.6g.png
- 3135×1432
- 23 Jun 2023 18:05
- 113.9 KB
- 22.6g_table.png
- 3142×655
- 23 Jun 2023 18:01
- 301.2 KB
- fixed_lo_block_diagram.png
- 1267×246
- 24 Jan 2023 20:03
- 24.4 KB
- hr_ifrejectionplot.png
- 1944×1190
- 13 Jul 2023 17:44
- 50 KB
- hr_imagerejection.png
- 1945×1189
- 13 Jul 2023 17:44
- 59.6 KB
- ifrejectionpaths.png
- 2643×1266
- 06 Jul 2023 16:47
- 102.5 KB
- ifrejectionplot.png
- 1920×1010
- 06 Jul 2023 16:20
- 49.6 KB
- ifrejectiontable.png
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- 05 Jul 2023 16:44
- 313 KB
- layoutstudy.jpg
- 2843×1539
- 11 Apr 2023 17:47
- 335.8 KB
- ln_ifrejection.png
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- 13 Jul 2023 17:47
- 52.3 KB
- ln_imagerejection.png
- 1743×1105
- 13 Jul 2023 17:44
- 49.1 KB
- lo_power_tree.jpg
- 3176×1519
- 23 Mar 2023 15:55
- 326.9 KB
- mxfe_clk_power_tree.jpg
- 2528×2006
- 20 Jul 2022 16:50
- 353.9 KB
- prototypingplatformhw.png
- 2026×708
- 24 Jan 2023 19:27
- 940.6 KB
- rxblockdiagram.png
- 3200×818
- 28 Jun 2023 16:17
- 146.5 KB
- rxfreqconversionsection.png
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- 28 Jun 2023 16:26
- 108.8 KB
- rxfreqplan.png
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- 28 Jun 2023 15:28
- 105.3 KB
- rxfrequencyplan.png
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- 06 Jul 2023 16:24
- 238.6 KB
- rx_cascade_lna_path_gain_levelling_v2.png
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- 07 Apr 2022 16:28
- 148 KB
- rx_cascade_preselector_path_gain_levelling_v2.png
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- 07 Apr 2022 16:28
- 129 KB
- rx_config_files.zip
- 13 Sep 2023 21:47
- 12.7 MB
- rx_input_blocker_sweep_agc_enabled.png
- 2294×1185
- 07 Apr 2022 16:28
- 298.1 KB
- rx_power_tree.jpg
- 2511×1935
- 20 Jul 2022 16:50
- 349.3 KB
- rx_switch_and_atten_control.png
- 1725×969
- 07 Apr 2022 16:28
- 195.6 KB
- timing_control.png
- 3628×2081
- 05 Jul 2023 17:37
- 415.8 KB
- tunable_lo_block_diagram.png
- 1938×347
- 24 Jan 2023 20:01
- 48.1 KB
- txblockdiagram.png
- 3200×1038
- 28 Jun 2023 16:17
- 159.5 KB
- txfreqconversionsection.png
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- 28 Jun 2023 16:19
- 136.2 KB
- txfreqplan.png
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- 28 Jun 2023 15:55
- 85.4 KB
- txfrequencyplan.png
- 758×860
- 08 Apr 2022 16:31
- 30.5 KB
- tx_block_diagram.png
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- 08 Apr 2022 16:31
- 111.4 KB
- tx_config_files.zip
- 13 Sep 2023 21:49
- 12.7 MB
- tx_frequency_conversion_section.png
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- 08 Apr 2022 20:30
- 381.5 KB
- tx_frequency_plan.png
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- 24 Jul 2023 18:12
- 250.2 KB
- tx_genesys_simulation.png
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- 08 Apr 2022 16:31
- 16.3 KB
- tx_if_input_section.png
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- 08 Apr 2022 20:30
- 146.5 KB
- tx_output_spectrum_12ghz.png
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- 12 Apr 2022 20:42
- 96.6 KB
- tx_power_tree.jpg
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- 20 Jul 2022 16:50
- 314 KB
- tx_rf_output_section.png
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- 08 Apr 2022 20:33
- 12 KB
- tx_rf_performance.png
- 3075×1184
- 12 Apr 2022 20:42
- 171.4 KB
- tx_switch_and_atten_ctrl.png
- 1708×952
- 08 Apr 2022 20:30
- 215.9 KB
- updatedrxcontrol.png
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- 25 Jul 2023 19:38
- 1.8 MB
- updatedtxcontrol.png
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- 25 Jul 2023 19:38
- 1.6 MB
- zcu102_ethernet_port.jpg
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- 13 Sep 2023 18:05
- 73.3 KB
- zcu102_sw6_sdcard.jpg
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- 13 Sep 2023 15:51
- 89.7 KB
- zcu102_usb_uart_port.jpg
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- 13 Sep 2023 17:20
- 71.8 KB
![[root]](/resources/fpga/xilinx/interposer/common_sdp?ns=&tab_files=files&do=media&tab_details=history&image=resources%3Aeval%3Afigure_7_output_ripple.png){kind=link}
resources/fpga/xilinx/interposer/common_sdp.txt · Last modified: 28 Sep 2012 10:32 by Adrian Costina