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![[root]](/resources/fpga/xilinx/interposer/common_sdp?ns=&tab_files=files&do=media&tab_details=history&image=resources%3Aeval%3Aad6674_sample1_ace_datapath_reset.png){kind=link}
![resources:eval:ad6674_sample1_ace_datapath_reset.png [05 Feb 2024 03:59]](/_detail/resources/eval/ad6674_sample1_ace_datapath_reset.png?rev=1707101976){kind=link}
![resources:eval:ad6674_sample1_ace_datapath_reset.png [16 Apr 2024 07:30]](/_detail/resources/eval/ad6674_sample1_ace_datapath_reset.png){kind=link}