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resources:fpga:xilinx:interposer:cn0241 [16 Nov 2012 17:39] – [Evaluation Boards] Lars-Peter Clausen | resources:fpga:xilinx:interposer:cn0241 [31 Jan 2014 09:25] – changed source code (without using Micrium uC-Probe), added Software Setup, remove programming with Impact Lucian Sin | ||
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====== Overview ====== | ====== Overview ====== | ||
- | This document presents the steps to setup an environment for using the **[[adi> | + | This document presents the steps to setup an environment for using the **[[adi> |
{{ : | {{ : | ||
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* [[adi>/ | * [[adi>/ | ||
* [[http:// | * [[http:// | ||
- | * [[http:// | ||
====== Getting Started ====== | ====== Getting Started ====== | ||
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===== Required Software ===== | ===== Required Software ===== | ||
- | * Xilinx ISE 13.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack). | + | * Xilinx ISE 14.6. |
- | * [[http://micrium.com/ | + | * UART Terminal (Termite/Tera Term/Hyperterminal), |
+ | * The EVAL-CN0241 reference project for Xilinx KC705 FPGA. | ||
===== Downloads ===== | ===== Downloads ===== | ||
- | + | <WRAP round download 80%> | |
- | * {{:resources: | + | \\ |
- | + | * **AD7920 Driver:** https://github.com/ | |
- | The following table presents a short description the reference design archive contents. | + | * **CN0241 Commands:** https:// |
- | + | | |
- | ^ **Folder** ^ **Description** ^ | + | * **EDK KC705 Reference |
- | | Bit | Contains the KC705 configuration file that can be used to program the system for quick evaluation. | | + | \\ |
- | | Microblaze | Contains the EDK 13.4 project for the Microblaze softcore that will be implemented in the KC705 FPGA. | | + | </ |
- | | Software | Contains the source files of the software | + | |
- | | uCProbeInterface | Contains the uCProbe interface and the .elf symbols file used by uC-Probe to access data from the Microbalze memory. | | + | |
====== Run the Demonstration Project ====== | ====== Run the Demonstration Project ====== | ||
- | {{page> | + | ===== Hardware setup ===== |
- | ===== Demonstration Project User Interface ===== | + | <WRAP round important 80%> |
+ | \\ | ||
+ | Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page. | ||
+ | </ | ||
- | The following figure presents | + | * Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector. |
+ | | ||
- | {{ : | + | ===== Reference Project Overview ===== |
+ | The following commands were implemented in this version of EVAL-CN0241 reference project for Xilinx KC705 FPGA board. | ||
+ | ^ Command ^ Description ^ | ||
+ | | **help?** | Displays all available commands. | | ||
+ | | **voltage? | ||
+ | | **adcCode? | ||
- | **Section A** is used to activate the board and monitor activity. The communication with the board is activated / deactivated by toggling the **// | + | Commands can be executed using a serial terminal connected |
- | **Section B** is used to acquire data from AD7920. | + | The following image shows a generic list of commands in a serial terminal connected |
+ | {{ : | ||
- | ===== Troubleshooting | + | ===== Software Project Setup ===== |
+ | {{page> | ||
- | In case there is a communication problem with the board the follwing actions can be perfomed in order to try to fix the issues: | ||
- | * Check that the evaluation board is powered as instructed in the board' | ||
- | * In uC-Probe refresh the symbols file by right-clicking on the **//System Browser//** window and selecting **//Refresh Symbols// | ||
- | * If the communication problem persists even after performing the previous steps, restart the uC-Probe application and try to run the interface again. | ||
====== More information ====== | ====== More information ====== | ||
{{page> | {{page> |