This document presents the steps to setup an environment for testing the FMC-SDP Interposer Board together with the ADZS-BRKOUT-EX3 SDP breakout board, the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the test system setup using the the Xilinx KC705 board.
The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project.
The following table presents a short description the reference design archive contents.
|Contains the KC705 configuration file that can be used to program the system for quick evaluation.
|Contains the EDK 13.4 project for the Microblaze softcore that will be implemented in the KC705 FPGA.
|Contains the source files of the software project that will be run by the Microblaze processor.
The testing of the FMC-SDP adapter board is carried out by checking the connectivity between the board’s pins. This is done by connecting the pins in pairs, applying a digital 1 on one pin form each pair and reading back the value on the other pin. All the pins are tested except the CON_RESETOUT which resets the adapter board. The IC pins are tested by checking that the level on these pins corresponds to a logic 1. The following steps must be performed for testing the FMC-SDP adapter board: