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The most recent version of this page is a draft.DiffThis version is outdated by a newer approved version.DiffThis version (28 Sep 2012 13:40) was approved by Adrian Costina, Lars-Peter Clausen.The Previously approved version (28 May 2012 15:53) is available.Diff

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Table of Contents

ADMP441 FMC-SDP Interposer & Evaluation Board / Xilinx KC705 Reference Design

Supported Devices

Evaluation Boards

Overview

This document presents the steps to setup an environment for using the EVAL-ADMP441Z evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-ADMP441Z Evaluation Board with the Xilinx KC705 board.

admp441.jpg

For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to use the part evaluation setup. This consists of:

  • 1. A controller board like the SDP-B ( EVAL-SDP-CS1Z)
  • 2. The component SDP compatible product evaluation board
  • 3. Corresponding PC software ( shipped with the product evaluation board)

The SDP-B controller board is part of Analog Devices System Demonstration Platform (SDP). It provides a high speed USB 2.0 connection from the PC to the component evaluation board. The PC runs the evaluation software. Each evaluation board, which is an SDP compatible daughter board, includes the necessary installation file required for performance testing.

Note: it is expected that the analog performance on the two platforms may differ.

28 Sep 2012 10:32 · Adrian Costina

Below is presented a picture of SDP-B Controller Board with the EVAL-ADMP441Z Evaluation Board.

admp441_sdp.jpg

The ADMP441 is a high performance, low power, digital output, omnidirectional MEMS microphone with a bottom port. The complete ADMP441 solution consists of a MEMS sensor, signal conditioning, an analog-to-digital converter, antialiasing filters, power management, and an industry standard 24-bit I2S inter-face. The I2S interface allows the ADMP441 to connect directly to digital processors, such as DSPs and microcontrollers, with-out the need for an audio codec in the system. The ADMP441 has a high SNR and high sensitivity, making it an excellent choice for far field applications. The ADMP441 has a flat wideband frequency response, resulting in natural sound with high intelligibility. A built-in particle filter provides high reliability.

The EVAL-ADMP441Z is a simple evaluation board that allows quick evaluation of the performance of the ADMP441 MEMS microphone. The small size and low profile of the flexible PCB enables direct placement of the microphone into a prototype or an existing design for an in situ evaluation. The EVAL-ADMP441Z-FLEX consists of an ADMP441 microphone soldered to a flexible PCB. The only other component on the board is a 0.1 μF supply bypass capacitor.

More information

Getting Started

The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project.

Required Hardware

Required Software

  • Xilinx ISE 13.4
  • A UART terminal (ex. TeraTerm / Hyperterminal).

Downloads

The following table presents a short description the reference design archive contents.

Folder Description
Bit Contains the KC705 configuration file that can be used to program the system for quick evaluation.
DataCapture Contains the script used to read data from the ADMP441 and save it into a file on the PC.
Microblaze Contains the EDK 13.2 project for the Microblaze softcore that will be implemented in the KC705 FPGA.
Software Contains the source files of the software project that will be run by the Microblaze processor.

Run the Demonstration Project

Hardware Setup

Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.
  • Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.
  • Connect the JTAG and UART cables to the KC705 and power up the FPGA board.
  • Start IMPACT, and double click “Boundary Scan”. Right click and select Initialize Chain. The program should recognize the Kintex 7 device (see screenshot below).

  • Program the KC705 FPGA using the “Bit/download.bit” file provided in the reference design archive.
  • Power the ADI evaluation board.
  • Start a UART terminal and set the baud rate to 115200 bps.

At this point everything is set up and it is possible to start the evaluation of the ADI hardware. To capture data from the microphones run the data_capture.bat script located in the DataCapture folder from the reference design .zip file. Every time the script is run, 20 seconds of audio data is recorded at 25000 Hz sample rate, and saved in EVAL_ADMP441Z_Demo.wav. The user can change the sample rate by modifying the value stored in Timer0, and the duration of the recording in seconds, by modifying the nrSeconds variable in main.c. The sample rate is calculated according to the period of the WS signal. If the user chooses to modify the duration of the recording, modifications must also be made in the tcl script in order to acquire the desired number of samples (for 20 seconds of audio data, the script acquires data for 10 * 100000 times).

The first time the data capture script is run it is possible that an error will occur while the script is trying to connect to the system. Just run the script again and the error shouldn't appear anymore. The same applies if you do not see any waveforms on the WS or SCLK pins on the evaluation board.

More information

28 May 2012 15:18
resources/fpga/xilinx/interposer/admp441.1348832407.txt.gz · Last modified: 28 Sep 2012 13:40 by Adrian Costina

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