This shows you the differences between two versions of the page.
Both sides previous revisionPrevious revisionNext revision | Previous revision | ||
resources:fpga:xilinx:interposer:ad9683 [03 Jan 2021 22:12] – fix links Robin Getz | resources:fpga:xilinx:interposer:ad9683 [28 Jan 2021 19:14] (current) – update arrow links after their web site update Robin Getz | ||
---|---|---|---|
Line 12: | Line 12: | ||
===== Supported Carriers ===== | ===== Supported Carriers ===== | ||
- | * [[xilinx> | + | * [[xilinx> |
===== Quick Start Guide ===== | ===== Quick Start Guide ===== | ||
Line 161: | Line 161: | ||
</ | </ | ||
- | Only Xilinx coregen xco files are provided with the reference design. You must regenerate the IP core files using this file. See [[http:// | + | Only Xilinx coregen xco files are provided with the reference design. You must regenerate the IP core files using this file. See [[/ |
<WRAP round help 80%> | <WRAP round help 80%> | ||
- | * Questions? [[http://ez.analog.com/ | + | * Questions? [[ez>fpga|Ask Help & Support]]. |
</ | </ | ||
===== Tar file contents ===== | ===== Tar file contents ===== | ||
- | The tar file contains, in most cases, the following files and/or directories. To rebuild the reference design simply double click the XMP file and run the tool. To build SDK, select a workspace and use the C file to build the elf file. Please refer to [[http://www.xilinx.com/support/ | + | The tar file contains, in most cases, the following files and/or directories. To rebuild the reference design simply double click the XMP file and run the tool. To build SDK, select a workspace and use the C file to build the elf file. Please refer to [[xilinx>support/ |
| license.txt | ADI license & copyright information. | | | license.txt | ADI license & copyright information. | |