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resources:fpga:xilinx:interposer:ad7091r [12 Jun 2013 15:57] – removed references to AD7091 Adrian Costinaresources:fpga:xilinx:interposer:ad7091r [22 Jul 2019 10:14] – Update no-OS driver link Andrei Drimbarean
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-====== AD7091R FMC-SDP Interposer & Evaluation Board / Xilinx KC705 Reference Design ======+====== AD7091R FMC-SDP Interposer & Evaluation Board / Xilinx AC701 Reference Design ======
  
  
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 This document presents the steps to setup an environment for using the **[[adi>AD7091R|EVAL-AD7091RSDZ]]** evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-AD7091RSDZ Evaluation Board with the Xilinx KC705 board. This document presents the steps to setup an environment for using the **[[adi>AD7091R|EVAL-AD7091RSDZ]]** evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-AD7091RSDZ Evaluation Board with the Xilinx KC705 board.
  
-{{ :resources:fpga:xilinx:interposer:ad7091r_kc705.jpg?400 }}+{{ :resources:fpga:xilinx:interposer:ad7091r_ac701.jpg?400 }}
  
 {{page>resources:fpga:xilinx:interposer:common_sdp}} {{page>resources:fpga:xilinx:interposer:common_sdp}}
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   * [[adi>AD7091R|AD7091R Product Info]] - pricing, samples, datasheet   * [[adi>AD7091R|AD7091R Product Info]] - pricing, samples, datasheet
   * [[adi>static/imported-files/user_guides/UG-409.pdf | EVAL-AD7091RSDZ evaluation board user guide]]   * [[adi>static/imported-files/user_guides/UG-409.pdf | EVAL-AD7091RSDZ evaluation board user guide]]
-  * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]+  * [[http://www.xilinx.com/products/boards-and-kits/EK-A7-AC701-G.htm | Xilinx AC705 FPGA board]]
  
 ====== Getting Started ====== ====== Getting Started ======
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 ===== Required Hardware ===== ===== Required Hardware =====
  
-  * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]+  * [[http://www.xilinx.com/products/boards-and-kits/EK-A7-AC701-G.htm | Xilinx AC705 FPGA board]]
   * FMC-SDP adapter board   * FMC-SDP adapter board
   * **EVAL-AD7091RSDZ** evaluation board   * **EVAL-AD7091RSDZ** evaluation board
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 ===== Required Software ===== ===== Required Software =====
  
-  * Xilinx ISE 14.4 +  * Xilinx ISE 14.6 
-  * A UART terminal (ex. TeraTerm / Hyperterminal).+  * A UART terminal (Tera Term/Hyperterminal/Termite), baud rate 115200.
  
 ===== Downloads ===== ===== Downloads =====
- +<WRAP round download 80%> 
-  * {{:resources:fpga:xilinx:interposer:ad7091R_evalboard.zip|Reference Design Files}} +\\ 
- +  * **IP Core Files:** https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_lib/edk/pcores/axi_ad7091_v1_00_a 
-The following table presents a short description the reference design archive contents. +  * **EDK AC701 Reference project:** https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_sdp_adc/cf_ad7091_ac701 
- +  * **AD7091R Drivers:** https://github.com/analogdevicesinc/no-OS/tree/master/drivers/adc/ad7091r 
-^ **Folder** ^ **Description** ^ +  * **ADC specific files:** https://github.com/analogdevicesinc/no-OS/tree/master/platform_drivers/Xilinx/SDP_ADC/AD7091 
-| Bit | Contains the KC705 configuration file that can be used to program the system for quick evaluation. | +  * **Platform specific files:** https://github.com/analogdevicesinc/no-OS/tree/master/platform_drivers/Xilinx/SDP_Common 
-| DataCapture | Contains the script used to read data from the ADC and save it into a file on the PC. | +\\ 
-| Hdl | Contains the HDL driver for the AD7091R ADC. | +</WRAP>
-| Microblaze | Contains the EDK 14.4 project for the Microblaze softcore that will be implemented in the KC705 FPGA. | +
-| Software | Contains the source files of the software project that will be run by the Microblaze processor.|+
  
 ====== Run the Demonstration Project ====== ====== Run the Demonstration Project ======
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   * Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.   * Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.
   * Connect the JTAG and UART cables to the KC705 and power up the FPGA board.   * Connect the JTAG and UART cables to the KC705 and power up the FPGA board.
-  * Start IMPACT, and double click “//Boundary Scan//”. Right click and select //Initialize Chain//. The program should recognize the Kintex 7 device (see screenshot below). 
-{{ :resources:fpga:xilinx:interposer:impact_config.png?300 }}  
-  * Program the KC705 FPGA using the "//Bit/download.bit//" file provided in the reference design archive. 
   * Power the ADI evaluation board.   * Power the ADI evaluation board.
   * Start a UART terminal and set the baud rate to 115200 bps.   * Start a UART terminal and set the baud rate to 115200 bps.
  
-At this point everything is set up and it is possible to start the evaluation of the ADI hardware. To capture data from the ADC run the //data_capture.bat// script located in the //DataCapture// folder from the reference design .zip file. Every time the script is run a new batch of 8192 samples are read from the ADC at the ADC's maximum sampling rate and saved into the //Acquisition.csv// file located in the same folder as the data capture script. On the UART terminal messages will be displayed to show the status of the program running on the FPGA as shown in the picture below.+The next step is to setup the software project.  
 + 
 +===== Software Project Setup ===== 
 + 
 +The next steps should be followed to recreate the software project of the reference design:
  
-{{ :resources:fpga:xilinx:interposer:teraterm_adc.png?400 }}+  * First clone the AC701 Reference project for AD7091 and the ADI IP cores from Github to your computer, by using the following link: https://github.com/analogdevicesinc/fpgahdl_xilinx/ 
  
-<WRAP tip>The first time the data capture script is run it is possible that an error will occur while the script is trying to connect to the system. Just run the script again and the error shouldn't appear anymore.</WRAP>+  * Copy the folder **../fpgahdl_xilinx/cf_lib** and **../fpgahdl_xilinx/cf_sdp_adc/cf_ad7091_ac701** to your working directory 
 +  * Open a Xilinx SDK and setup your workspace to **%Working directory%/cf_ad7091_ac701/SDK/SDK_Workspace** 
 +  * In the SDK select the **File->Import** menu option to import the software project into your workspace. 
 +{{:resources:fpga:xilinx:fmc:ad9739a_ebz:file_import.png?200|Import Projects}} 
 +  * In the //Import// window select the **General->Existing Projects into Workspace** option. 
 +{{:resources:fpga:xilinx:fmc:ad9739a_ebz:existing_project_import.png?200|Existing Projects Import}} 
 +  * In the //Import Projects// window select the **%Working directory%/cf_ad7091_ac701/** folder as root directory and verify if all the three project (**hw**, **bsp**, **sw**) are checked. 
 +{{:resources:fpga:xilinx:interposer:import_project_adc.png?200|Selecting Existing Projects}} 
 +  * The Project Explorer window now shows the projects that exist in the workspace without software files. 
 +{{:resources:fpga:xilinx:fmc:ad9739a_ebz:project_explorer.jpg?200|Project Explorer}} 
 +  * Now you have to add the source files to your project. You can download all the source files for the current reference project using the links from the **Downloads** section. List of source files for the current project is:   
 +                       * **Driver files** : //ad7091.h// and //ad7091.c// 
 +                       * **Platform specific files** : //Communication.h//, //Communication.c//, //TIME.h// and //TIME.c//  
 +                       * **ADC specific files** : //main.c// and //xdma_config.h// 
 +  * All these files must be copied into the **%Working directory%/cf_ad7091_ac701/SDK/SDK_Workspace/sw/src/** folder. 
 +  * The SDK should automatically build the project and the Console window will display the result of the build. If the build is not done automatically, select the Project→Build Automatically menu option. 
 +  * If the project was built without any errors, you need to download the data capture script, from [[https://github.com/analogdevicesinc/no-OS/tree/master/platform_drivers/Xilinx/SDP_ADC/AD7091|here]]. Copy the **Data_capture** folder to your working directory.   
 +  * Run the **data_capture.bat** script. If the acquisition is finished with success, it should appear a file called **Acquisition.csv** with the result of the conversion. 
 +{{:resources:fpga:xilinx:interposer:acquisition_finished.png?600|Acquisition Finished}} 
 +  * By default the length of a transaction is 16k samples. The input signal used in this reference design was a 10 Khz sine wave. 
 +{{:resources:fpga:xilinx:interposer:acquisition_result.png?600|Acquisition Result}}
  
 ====== More information ====== ====== More information ======
 {{page>/resources/fpga/xilinx/interposer/ez_common}} {{page>/resources/fpga/xilinx/interposer/ez_common}}
resources/fpga/xilinx/interposer/ad7091r.txt · Last modified: 08 Feb 2021 13:53 by Iulia Moldovan

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