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resources:fpga:xilinx:interposer:ad5694r [28 May 2012 15:44] – Approved Alexandru.Tofanresources:fpga:xilinx:interposer:ad5694r [03 Jan 2013 20:42] – external edit
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 {{ :resources:fpga:xilinx:interposer:img_ad5694r.jpg?400 }} {{ :resources:fpga:xilinx:interposer:img_ad5694r.jpg?400 }}
  
-For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to Analog Devices [[/resources/eval/sdp|System Demonstration Platform]] (**SDP**). The **SDP** consists of a: +{{page>common_sdp}}
-  * a controller board, like the **[[resources/eval/sdp/sdp-b|EVAL-SDP-CB1Z]] (SDP-B)** +
-  * a compatible Analog Devices SDP [[adi>sdp#exallist|product evaluation board]] +
-  * corresponding PC software +
-The EVAL-SDP-CB1Z controller board is part of Analog Devices SDP providing USB 2.0 high-speed connectivity to a PC computer running specific component evaluation software.  Each SDP evaluation daughter board includes the necessary installation files needed for this performance testing. It's expected that the analog performance on the two platforms may differ.+
  
 Below is presented a picture of **SDP-B** Controller Board with the **EVAL-AD5694RSDZ** Evaluation Board. Below is presented a picture of **SDP-B** Controller Board with the **EVAL-AD5694RSDZ** Evaluation Board.
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 ===== Hardware Setup ===== ===== Hardware Setup =====
  
-<note important>Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.</note>+<WRAP important>Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.</WRAP>
  
   * Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.   * Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.
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 {{ :resources:fpga:altera:bemicro:image081.png?200 }} {{ :resources:fpga:altera:bemicro:image081.png?200 }}
  
-<note tip>In some cases it is possible that the uC-Probe interface will not respond to the commands the first time it is ran. In this situation just stop the interface by pressing the **//Stop//** button and run it again by pressing the **//Play//** button.</note>+<WRAP tip>In some cases it is possible that the uC-Probe interface will not respond to the commands the first time it is ran. In this situation just stop the interface by pressing the **//Stop//** button and run it again by pressing the **//Play//** button.</WRAP>
  
 ===== Demonstration Project User Interface ===== ===== Demonstration Project User Interface =====
resources/fpga/xilinx/interposer/ad5694r.txt · Last modified: 09 Jan 2021 00:48 by Robin Getz

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